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| author | Josh Blum <josh@joshknows.com> | 2012-02-01 18:02:59 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-02-01 18:02:59 -0800 |
| commit | 5e972e7446edb79f8ed582970b2dff40a93919ae (patch) | |
| tree | 614264156cf8fd6b0a719af1c363b8bd535521e7 /host/lib | |
| parent | a0887f3bd37e840f5b8ccb894478213e5eae7ed1 (diff) | |
| download | uhd-5e972e7446edb79f8ed582970b2dff40a93919ae.tar.gz uhd-5e972e7446edb79f8ed582970b2dff40a93919ae.tar.bz2 uhd-5e972e7446edb79f8ed582970b2dff40a93919ae.zip | |
b100: sc8 mode not implemented error
Diffstat (limited to 'host/lib')
| -rw-r--r-- | host/lib/usrp/b100/io_impl.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/host/lib/usrp/b100/io_impl.cpp b/host/lib/usrp/b100/io_impl.cpp index 60c37bded..7c07c6349 100644 --- a/host/lib/usrp/b100/io_impl.cpp +++ b/host/lib/usrp/b100/io_impl.cpp @@ -260,6 +260,10 @@ tx_streamer::sptr b100_impl::get_tx_stream(const uhd::stream_args_t &args_){ args.otw_format = args.otw_format.empty()? "sc16" : args.otw_format; args.channels = args.channels.empty()? std::vector<size_t>(1, 0) : args.channels; + if (args.otw_format == "sc8"){ + throw uhd::value_error("USRP TX requested wire format not implemented in FPGA: " + args.otw_format); + } + //calculate packet size static const size_t hdr_size = 0 + vrt::max_if_hdr_words32*sizeof(boost::uint32_t) |