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author | Josh Blum <josh@joshknows.com> | 2010-08-18 00:54:27 +0000 |
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committer | Josh Blum <josh@joshknows.com> | 2010-08-18 00:54:27 +0000 |
commit | f001559f976786c355ee5fb6446b1f245fbc3f94 (patch) | |
tree | a8e1dffaa64181d40bcd0b53eb358d5e4419e1d2 /host/lib | |
parent | c3fc2010bffbb74414c029910347c6aa28c2b8d4 (diff) | |
parent | f7fab232e5b6124b0bda821736ac309ccc0cab94 (diff) | |
download | uhd-f001559f976786c355ee5fb6446b1f245fbc3f94.tar.gz uhd-f001559f976786c355ee5fb6446b1f245fbc3f94.tar.bz2 uhd-f001559f976786c355ee5fb6446b1f245fbc3f94.zip |
Merge branch 'usrp_e' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e
Diffstat (limited to 'host/lib')
-rw-r--r-- | host/lib/usrp/usrp_e/codec_ctrl.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/host/lib/usrp/usrp_e/codec_ctrl.cpp b/host/lib/usrp/usrp_e/codec_ctrl.cpp index 2bdbc0f1c..837219759 100644 --- a/host/lib/usrp/usrp_e/codec_ctrl.cpp +++ b/host/lib/usrp/usrp_e/codec_ctrl.cpp @@ -29,7 +29,7 @@ using namespace uhd; -static const bool codec_debug = false; +static const bool codec_debug = true; const gain_range_t usrp_e_codec_ctrl::tx_pga_gain_range(-20, 0, float(0.1)); const gain_range_t usrp_e_codec_ctrl::rx_pga_gain_range(0, 20, 1); @@ -89,6 +89,7 @@ usrp_e_codec_ctrl_impl::usrp_e_codec_ctrl_impl(usrp_e_iface::sptr iface){ //setup tx side of codec _ad9862_regs.two_data_paths = ad9862_regs_t::TWO_DATA_PATHS_BOTH; _ad9862_regs.interleaved = ad9862_regs_t::INTERLEAVED_INTERLEAVED; + _ad9862_regs.tx_retime = ad9862_regs_t::TX_RETIME_CLKOUT2; _ad9862_regs.tx_pga_gain = 199; //TODO bring under api control _ad9862_regs.tx_hilbert = ad9862_regs_t::TX_HILBERT_DIS; _ad9862_regs.interp = ad9862_regs_t::INTERP_2; @@ -97,7 +98,7 @@ usrp_e_codec_ctrl_impl::usrp_e_codec_ctrl_impl(usrp_e_iface::sptr iface){ _ad9862_regs.coarse_mod = ad9862_regs_t::COARSE_MOD_BYPASS; _ad9862_regs.dac_a_coarse_gain = 0x3; _ad9862_regs.dac_b_coarse_gain = 0x3; - _ad9862_regs.edges = ad9862_regs_t::EDGES_BOTH; + _ad9862_regs.edges = ad9862_regs_t::EDGES_NORMAL; //setup the dll _ad9862_regs.input_clk_ctrl = ad9862_regs_t::INPUT_CLK_CTRL_EXTERNAL; |