added 16 bit peek and poke, 16 bit register defs for gpios and atrs

8 files changed, 89 insertions, 72 deletions

diff --git a/host/lib/usrp/usrp2/dboard_impl.cpp b/host/lib/usrp/usrp2/dboard_impl.cpp
index 30883cd50..39e4baa7b 100644
--- a/host/lib/usrp/usrp2/dboard_impl.cpp
+++ b/host/lib/usrp/usrp2/dboard_impl.cpp
@@ -81,7 +81,7 @@ void usrp2_impl::update_rx_mux_config(void){
         rx_mux = (((rx_mux >> 0) & 0x3) << 2) | (((rx_mux >> 2) & 0x3) << 0);
     }
 
-    this->poke(FR_DSP_RX_MUX, rx_mux);
+    this->poke32(FR_DSP_RX_MUX, rx_mux);
 }
 
 void usrp2_impl::update_tx_mux_config(void){
@@ -94,7 +94,7 @@ void usrp2_impl::update_tx_mux_config(void){
         tx_mux = (((tx_mux >> 0) & 0x1) << 1) | (((tx_mux >> 1) & 0x1) << 0);
     }
 
-    this->poke(FR_DSP_TX_MUX, tx_mux);
+    this->poke32(FR_DSP_TX_MUX, tx_mux);
 }
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp2/dboard_interface.cpp b/host/lib/usrp/usrp2/dboard_interface.cpp
index 2e79381c5..87fc19117 100644
--- a/host/lib/usrp/usrp2/dboard_interface.cpp
+++ b/host/lib/usrp/usrp2/dboard_interface.cpp
@@ -48,17 +48,6 @@ private:
     );
 
     usrp2_impl *_impl;
-
-    //shadows
-    boost::uint32_t _ddr_shadow;
-    uhd::dict<atr_reg_t, boost::uint32_t> _atr_reg_shadows;
-
-    //utilities
-    static int bank_to_shift(gpio_bank_t bank){
-        static const uhd::dict<gpio_bank_t, int> _bank_to_shift = \
-        boost::assign::map_list_of(GPIO_BANK_RX, 0)(GPIO_BANK_TX, 16);
-        return _bank_to_shift[bank];
-    }
 };
 
 /***********************************************************************
@@ -73,7 +62,6 @@ dboard_interface::sptr make_usrp2_dboard_interface(usrp2_impl *impl){
  **********************************************************************/
 usrp2_dboard_interface::usrp2_dboard_interface(usrp2_impl *impl){
     _impl = impl;
-    _ddr_shadow = 0;
 }
 
 usrp2_dboard_interface::~usrp2_dboard_interface(void){
@@ -95,42 +83,40 @@ double usrp2_dboard_interface::get_tx_clock_rate(void){
  * GPIO
  **********************************************************************/
 void usrp2_dboard_interface::set_gpio_ddr(gpio_bank_t bank, boost::uint16_t value){
-    //calculate the new 32 bit ddr value
-    int shift = bank_to_shift(bank);
-    boost::uint32_t new_ddr_val =
-        (_ddr_shadow & ~(boost::uint32_t(0xffff) << shift)) //zero out new bits
-        | (boost::uint32_t(value) << shift); //or'ed in the new bits
-
-    //poke in the value and shadow
-    _impl->poke(FR_GPIO_DDR, new_ddr_val);
-    _ddr_shadow = new_ddr_val;
+    static const uhd::dict<gpio_bank_t, boost::uint32_t> bank_to_addr = boost::assign::map_list_of
+        (GPIO_BANK_RX, FR_GPIO_RX_DDR)
+        (GPIO_BANK_TX, FR_GPIO_TX_DDR)
+    ;
+    _impl->poke16(bank_to_addr[bank], value);
 }
 
 boost::uint16_t usrp2_dboard_interface::read_gpio(gpio_bank_t bank){
-    boost::uint32_t data = _impl->peek(FR_GPIO_IO);
-    return boost::uint16_t(data >> bank_to_shift(bank));
+    static const uhd::dict<gpio_bank_t, boost::uint32_t> bank_to_addr = boost::assign::map_list_of
+        (GPIO_BANK_RX, FR_GPIO_RX_IO)
+        (GPIO_BANK_TX, FR_GPIO_TX_IO)
+    ;
+    return _impl->peek16(bank_to_addr[bank]);
 }
 
-void usrp2_dboard_interface::set_atr_reg(gpio_bank_t bank, atr_reg_t reg, boost::uint16_t value){
-    //map the atr reg to an offset in register space
-    static const uhd::dict<atr_reg_t, int> reg_to_addr = boost::assign::map_list_of
-        (ATR_REG_IDLE, FR_ATR_IDLE) (ATR_REG_TX_ONLY, FR_ATR_TX)
-        (ATR_REG_RX_ONLY, FR_ATR_RX) (ATR_REG_FULL_DUPLEX, FR_ATR_FULL)
+void usrp2_dboard_interface::set_atr_reg(gpio_bank_t bank, atr_reg_t atr, boost::uint16_t value){
+    //define mapping of bank to atr regs to register address
+    static const uhd::dict<
+        gpio_bank_t, uhd::dict<atr_reg_t, boost::uint32_t>
+    > bank_to_atr_to_addr = boost::assign::map_list_of
+        (GPIO_BANK_RX, boost::assign::map_list_of
+            (ATR_REG_IDLE,        FR_ATR_IDLE_RXSIDE)
+            (ATR_REG_TX_ONLY,     FR_ATR_INTX_RXSIDE)
+            (ATR_REG_RX_ONLY,     FR_ATR_INRX_RXSIDE)
+            (ATR_REG_FULL_DUPLEX, FR_ATR_FULL_RXSIDE)
+        )
+        (GPIO_BANK_TX, boost::assign::map_list_of
+            (ATR_REG_IDLE,        FR_ATR_IDLE_TXSIDE)
+            (ATR_REG_TX_ONLY,     FR_ATR_INTX_TXSIDE)
+            (ATR_REG_RX_ONLY,     FR_ATR_INRX_TXSIDE)
+            (ATR_REG_FULL_DUPLEX, FR_ATR_FULL_TXSIDE)
+        )
     ;
-    ASSERT_THROW(reg_to_addr.has_key(reg));
-
-    //ensure a value exists in the shadow
-    if (not _atr_reg_shadows.has_key(reg)) _atr_reg_shadows[reg] = 0;
-
-    //calculate the new 32 bit atr value
-    int shift = bank_to_shift(bank);
-    boost::uint32_t new_atr_val =
-        (_atr_reg_shadows[reg] & ~(boost::uint32_t(0xffff) << shift)) //zero out new bits
-        | (boost::uint32_t(value) << shift); //or'ed in the new bits
-
-    //poke in the value and shadow
-    _impl->poke(reg_to_addr[reg], new_atr_val);
-    _atr_reg_shadows[reg] = new_atr_val;
+    _impl->poke16(bank_to_atr_to_addr[bank][atr], value);
 }
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp2/dsp_impl.cpp b/host/lib/usrp/usrp2/dsp_impl.cpp
index 647a8bf1c..1fe7b7f25 100644
--- a/host/lib/usrp/usrp2/dsp_impl.cpp
+++ b/host/lib/usrp/usrp2/dsp_impl.cpp
@@ -72,11 +72,11 @@ void usrp2_impl::init_ddc_config(void){
 
 void usrp2_impl::update_ddc_config(void){
     //set the decimation
-    this->poke(FR_DSP_RX_DECIM_RATE, _ddc_decim);
+    this->poke32(FR_DSP_RX_DECIM_RATE, _ddc_decim);
 
     //set the scaling
     static const boost::int16_t default_rx_scale_iq = 1024;
-    this->poke(FR_DSP_RX_SCALE_IQ,
+    this->poke32(FR_DSP_RX_SCALE_IQ,
         calculate_iq_scale_word(default_rx_scale_iq, default_rx_scale_iq)
     );
 }
@@ -190,7 +190,7 @@ void usrp2_impl::ddc_set(const wax::obj &key, const wax::obj &val){
         ASSERT_THROW(new_freq <= get_master_clock_freq()/2.0);
         ASSERT_THROW(new_freq >= -get_master_clock_freq()/2.0);
         _ddc_freq = new_freq; //shadow
-        this->poke(FR_DSP_RX_FREQ,
+        this->poke32(FR_DSP_RX_FREQ,
             calculate_freq_word_and_update_actual_freq(_ddc_freq, get_master_clock_freq())
         );
         return;
@@ -231,10 +231,10 @@ void usrp2_impl::update_duc_config(void){
     boost::int16_t scale = rint((4096*std::pow(2, ceil(log2(interp_cubed))))/(1.65*interp_cubed));
 
     //set the interpolation
-    this->poke(FR_DSP_TX_INTERP_RATE, _ddc_decim);
+    this->poke32(FR_DSP_TX_INTERP_RATE, _ddc_decim);
 
     //set the scaling
-    this->poke(FR_DSP_TX_SCALE_IQ, calculate_iq_scale_word(scale, scale));
+    this->poke32(FR_DSP_TX_SCALE_IQ, calculate_iq_scale_word(scale, scale));
 }
 
 /***********************************************************************
@@ -308,7 +308,7 @@ void usrp2_impl::duc_set(const wax::obj &key, const wax::obj &val){
         ASSERT_THROW(new_freq <= get_master_clock_freq()/2.0);
         ASSERT_THROW(new_freq >= -get_master_clock_freq()/2.0);
         _duc_freq = new_freq; //shadow
-        this->poke(FR_DSP_TX_FREQ,
+        this->poke32(FR_DSP_TX_FREQ,
             calculate_freq_word_and_update_actual_freq(_duc_freq, get_master_clock_freq())
         );
         return;
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index 7f35c8abd..019f3b931 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -138,6 +138,7 @@ typedef struct{
         struct {
             _SINS_ uint32_t addr;
             _SINS_ uint32_t data;
+            _SINS_ uint8_t num_bytes; //1, 2, 4
         } poke_args;
     } data;
 } usrp2_ctrl_data_t;
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 7594c85fa..ceb2ec98f 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -67,19 +67,19 @@ void usrp2_impl::update_clock_config(void){
     }
 
     //set the pps flags
-    this->poke(FR_TIME64_FLAGS, pps_flags);
+    this->poke32(FR_TIME64_FLAGS, pps_flags);
 
     //TODO clock source ref 10mhz (spi ad9510)
 }
 
 void usrp2_impl::set_time_spec(const time_spec_t &time_spec, bool now){
     //set ticks and seconds
-    this->poke(FR_TIME64_SECS, time_spec.secs);
-    this->poke(FR_TIME64_TICKS, time_spec.ticks);
+    this->poke32(FR_TIME64_SECS, time_spec.secs);
+    this->poke32(FR_TIME64_TICKS, time_spec.ticks);
 
     //set the register to latch it all in
     boost::uint32_t imm_flags = (now)? FRF_TIME64_LATCH_NOW : FRF_TIME64_LATCH_NEXT_PPS;
-    this->poke(FR_TIME64_IMM, imm_flags);
+    this->poke32(FR_TIME64_IMM, imm_flags);
 }
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index b3a22e175..d7a9845cd 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -174,28 +174,47 @@ double usrp2_impl::get_master_clock_freq(void){
     return 100e6;
 }
 
-void usrp2_impl::poke(boost::uint32_t addr, boost::uint32_t data){
+template <class T> void impl_poke(usrp2_impl *impl, boost::uint32_t addr, T data){
     //setup the out data
     usrp2_ctrl_data_t out_data;
     out_data.id = htonl(USRP2_CTRL_ID_POKE_THIS_REGISTER_FOR_ME_BRO);
     out_data.data.poke_args.addr = htonl(addr);
-    out_data.data.poke_args.data = htonl(data);
+    out_data.data.poke_args.data = htonl(boost::uint32_t(data));
+    out_data.data.poke_args.num_bytes = sizeof(T);
 
     //send and recv
-    usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data);
+    usrp2_ctrl_data_t in_data = impl->ctrl_send_and_recv(out_data);
     ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_OMG_POKED_REGISTER_SO_BAD_DUDE);
 }
 
-boost::uint32_t usrp2_impl::peek(boost::uint32_t addr){
+template <class T> T impl_peek(usrp2_impl *impl, boost::uint32_t addr){
     //setup the out data
     usrp2_ctrl_data_t out_data;
     out_data.id = htonl(USRP2_CTRL_ID_PEEK_AT_THIS_REGISTER_FOR_ME_BRO);
     out_data.data.poke_args.addr = htonl(addr);
+    out_data.data.poke_args.num_bytes = sizeof(T);
 
     //send and recv
-    usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data);
+    usrp2_ctrl_data_t in_data = impl->ctrl_send_and_recv(out_data);
     ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE);
-    return ntohl(out_data.data.poke_args.data);
+    return T(ntohl(out_data.data.poke_args.data));
+}
+
+
+void usrp2_impl::poke32(boost::uint32_t addr, boost::uint32_t data){
+    return impl_poke<boost::uint32_t>(this, addr, data);
+}
+
+boost::uint32_t usrp2_impl::peek32(boost::uint32_t addr){
+    return impl_peek<boost::uint32_t>(this, addr);
+}
+
+void usrp2_impl::poke16(boost::uint32_t addr, boost::uint16_t data){
+    return impl_poke<boost::uint16_t>(this, addr, data);
+}
+
+boost::uint16_t usrp2_impl::peek16(boost::uint32_t addr){
+    return impl_peek<boost::uint16_t>(this, addr);
 }
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp
index 7c55d4c3c..26f9bb386 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.hpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.hpp
@@ -103,8 +103,11 @@ public:
     usrp2_ctrl_data_t ctrl_send_and_recv(const usrp2_ctrl_data_t &);
 
     //peek and poke registers
-    void poke(boost::uint32_t addr, boost::uint32_t data);
-    boost::uint32_t peek(boost::uint32_t addr);
+    void poke32(boost::uint32_t addr, boost::uint32_t data);
+    boost::uint32_t peek32(boost::uint32_t addr);
+
+    void poke16(boost::uint32_t addr, boost::uint16_t data);
+    boost::uint16_t peek16(boost::uint32_t addr);
 
     //misc access methods
     double get_master_clock_freq(void);
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 10545d712..0a2de2c6d 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -175,11 +175,14 @@
 //
 // These go to the daughterboard i/o pins
 //
-#define _FR_GPIO_ADDR(off) (0xC800 + (off) * sizeof(boost::uint32_t))
-#define FR_GPIO_IO     _FR_GPIO_ADDR(0)       // tx data in high 16, rx in low 16
-#define FR_GPIO_DDR    _FR_GPIO_ADDR(1)       // 32 bits, 1 means output. tx in high 16, rx in low 16
-#define FR_GPIO_TX_SEL _FR_GPIO_ADDR(2)       // 16 2-bit fields select which source goes to TX DB
-#define FR_GPIO_RX_SEL _FR_GPIO_ADDR(3)       // 16 2-bit fields select which source goes to RX DB
+#define FR_GPIO_BASE 0xC800
+
+#define FR_GPIO_RX_IO      FR_GPIO_BASE + 0  // 16 io data pins
+#define FR_GPIO_TX_IO      FR_GPIO_BASE + 2  // 16 io data pins
+#define FR_GPIO_RX_DDR     FR_GPIO_BASE + 4  // 16 ddr pins, 1 means output
+#define FR_GPIO_TX_DDR     FR_GPIO_BASE + 6  // 16 ddr pins, 1 means output
+#define FR_GPIO_TX_SEL     FR_GPIO_BASE + 8  // 16 2-bit fields select which source goes to TX DB
+#define FR_GPIO_RX_SEL     FR_GPIO_BASE + 12 // 16 2-bit fields select which source goes to RX DB
 
 // each 2-bit sel field is layed out this way
 #define FRF_GPIO_SEL_SW        0 // if pin is an output, set by software in the io reg
@@ -190,10 +193,15 @@
 ///////////////////////////////////////////////////
 // ATR Controller, Slave 11
 ////////////////////////////////////////////////
-#define _FR_ATR_ADDR(off) (0xE400 + (off) * sizeof(boost::uint32_t))
-#define FR_ATR_IDLE    _FR_ATR_ADDR(0) // tx data in high 16, rx in low 16
-#define FR_ATR_TX      _FR_ATR_ADDR(1)
-#define FR_ATR_RX      _FR_ATR_ADDR(2)
-#define FR_ATR_FULL    _FR_ATR_ADDR(3)
+#define FR_ATR_BASE  0xE400
+
+#define FR_ATR_IDLE_RXSIDE  FR_ATR_BASE + 0
+#define FR_ATR_IDLE_TXSIDE  FR_ATR_BASE + 2
+#define FR_ATR_INTX_RXSIDE  FR_ATR_BASE + 4
+#define FR_ATR_INTX_TXSIDE  FR_ATR_BASE + 6
+#define FR_ATR_INRX_RXSIDE  FR_ATR_BASE + 8
+#define FR_ATR_INRX_TXSIDE  FR_ATR_BASE + 10
+#define FR_ATR_FULL_RXSIDE  FR_ATR_BASE + 12
+#define FR_ATR_FULL_TXSIDE  FR_ATR_BASE + 14
 
 #endif /* INCLUDED_USRP2_REGS_HPP */