rfnoc: Support for new backend iface plus fixes

- Add support for new backend iface with max_async_msgs and mtu
  moved to after the noc ID
- Fixed offsets for block info registers

3 files changed, 18 insertions, 12 deletions

diff --git a/host/lib/include/uhdlib/rfnoc/chdr_ctrl_endpoint.hpp b/host/lib/include/uhdlib/rfnoc/chdr_ctrl_endpoint.hpp
index c13955888..afaa22306 100644
--- a/host/lib/include/uhdlib/rfnoc/chdr_ctrl_endpoint.hpp
+++ b/host/lib/include/uhdlib/rfnoc/chdr_ctrl_endpoint.hpp
@@ -7,7 +7,7 @@
 #ifndef INCLUDED_LIBUHD_RFNOC_CHDR_CTRL_ENDPOINT_HPP
 #define INCLUDED_LIBUHD_RFNOC_CHDR_CTRL_ENDPOINT_HPP
 
-#include <uhdlib/rfnoc/chdr/chdr_types.hpp>
+#include <uhdlib/rfnoc/chdr/chdr_packet.hpp>
 #include <uhdlib/rfnoc/ctrlport_endpoint.hpp>
 #include <uhdlib/rfnoc/xports.hpp>
 #include <functional>
diff --git a/host/lib/include/uhdlib/rfnoc/client_zero.hpp b/host/lib/include/uhdlib/rfnoc/client_zero.hpp
index 8eb2d6397..c6d3e879b 100644
--- a/host/lib/include/uhdlib/rfnoc/client_zero.hpp
+++ b/host/lib/include/uhdlib/rfnoc/client_zero.hpp
@@ -8,8 +8,11 @@
 #define INCLUDED_LIBUHD_CLIENT_ZERO_HPP
 
 #include <uhd/rfnoc/register_iface_holder.hpp>
+#include <uhdlib/rfnoc/chdr_ctrl_endpoint.hpp>
 #include <chrono>
 #include <cstdint>
+#include <functional>
+#include <memory>
 #include <string>
 #include <vector>
 
@@ -40,7 +43,8 @@ public:
         uint8_t num_inputs;
         uint8_t num_outputs;
         uint8_t ctrl_fifo_size;
-        uint8_t mtu;
+        uint8_t ctrl_max_async_msgs;
+        uint8_t data_mtu;
     };
 
     //! Return the RFNoC protocol version for this motherboard
diff --git a/host/lib/rfnoc/client_zero.cpp b/host/lib/rfnoc/client_zero.cpp
index 91140f9e8..82c44eaf4 100644
--- a/host/lib/rfnoc/client_zero.cpp
+++ b/host/lib/rfnoc/client_zero.cpp
@@ -103,7 +103,7 @@ uint32_t client_zero::get_noc_id(uint16_t portno)
 {
     _check_port_number(portno);
     // The NOC ID is the second entry in the port's register space
-    return regs().peek32(_get_port_base_addr(portno) + 1);
+    return regs().peek32(_get_port_base_addr(portno) + 4);
 }
 
 bool client_zero::get_flush_active(uint16_t portno)
@@ -175,16 +175,18 @@ void client_zero::reset_chdr(uint16_t portno)
 client_zero::block_config_info client_zero::get_block_info(uint16_t portno)
 {
     _check_port_number(portno);
-    // The configuration information is in the port's first register
-    uint32_t config_reg_val = regs().peek32(_get_port_base_addr(portno));
-    return {uhd::narrow_cast<uint8_t>((config_reg_val & 0x000000FF) >> 0),
-        uhd::narrow_cast<uint8_t>((config_reg_val & 0x00003F00) >> 8),
-        uhd::narrow_cast<uint8_t>((config_reg_val & 0x000FC000) >> 14),
-        uhd::narrow_cast<uint8_t>((config_reg_val & 0x03F00000) >> 20),
-        uhd::narrow_cast<uint8_t>((config_reg_val & 0xFC000000) >> 26)};
+    // The block and ctrl information is in the port's first register
+    uint32_t config_reg_val = regs().peek32(_get_port_base_addr(portno) + 0);
+    // The block and ctrl information is in the port's third register
+    uint32_t data_reg_val = regs().peek32(_get_port_base_addr(portno) + 8);
+    return {uhd::narrow_cast<uint8_t>((config_reg_val & 0x0000003F) >> 0),
+        uhd::narrow_cast<uint8_t>((config_reg_val & 0x00000FC0) >> 6),
+        uhd::narrow_cast<uint8_t>((config_reg_val & 0x0003F000) >> 12),
+        uhd::narrow_cast<uint8_t>((config_reg_val & 0x00FC0000) >> 18),
+        uhd::narrow_cast<uint8_t>((config_reg_val & 0xFF000000) >> 24),
+        uhd::narrow_cast<uint8_t>((data_reg_val & 0x000000FC) >> 2)};
 }
 
-
 uint32_t client_zero::_get_port_base_addr(uint16_t portno)
 {
     return REGS_PER_PORT * portno * 4;
@@ -209,5 +211,5 @@ uint32_t client_zero::_get_flush_status_flags(uint16_t portno)
 {
     _check_port_number(portno);
     // The flush status flags are in the third register of the port
-    return regs().peek32(_get_port_base_addr(portno) + 2);
+    return regs().peek32(_get_port_base_addr(portno) + 8);
 }