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authorMark Meserve <mark.meserve@ni.com>2018-08-20 16:12:00 -0500
committerMartin Braun <martin.braun@ettus.com>2018-08-21 14:14:11 -0700
commit0aede451a2f1006aa67450a7d0a07d18a92be138 (patch)
tree946877341d7d8352558260914b221c31c9876b20 /host/lib
parent840c518f3cc5939e5f69b08779a15ea1d573ce6e (diff)
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twinrx: enable ch1 lo amps if ch2 is using an external lo source
- AMP_LO1_EN_CH1 controls U2, the amp for the external LO1 port, so it must be set high if channel 2 is using an external LO (external or reimport)
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp14
1 files changed, 13 insertions, 1 deletions
diff --git a/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp b/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp
index d8233e1f7..4b8cd5cd5 100644
--- a/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp
+++ b/host/lib/usrp/dboard/twinrx/twinrx_ctrl.cpp
@@ -148,15 +148,17 @@ public:
{
boost::lock_guard<boost::mutex> lock(_mutex);
if (ch == CH1 or ch == BOTH) {
- _cpld_regs->rf1_reg1.set(rm::rf1_reg1_t::AMP_LO1_EN_CH1, bool2bin(enabled));
_cpld_regs->if0_reg3.set(rm::if0_reg3_t::IF1_IF2_EN_CH1, bool2bin(enabled));
_cpld_regs->if0_reg0.set(rm::if0_reg0_t::AMP_LO2_EN_CH1, bool2bin(enabled));
+ _chan_enabled[size_t(CH1)] = enabled;
}
if (ch == CH2 or ch == BOTH) {
_cpld_regs->rf1_reg5.set(rm::rf1_reg5_t::AMP_LO1_EN_CH2, bool2bin(enabled));
_cpld_regs->if0_reg4.set(rm::if0_reg4_t::IF1_IF2_EN_CH2, bool2bin(enabled));
_cpld_regs->if0_reg0.set(rm::if0_reg0_t::AMP_LO2_EN_CH2, bool2bin(enabled));
+ _chan_enabled[size_t(CH2)] = enabled;
}
+ _set_lo1_amp(_chan_enabled[size_t(CH1)], _chan_enabled[size_t(CH2)], _lo1_src[size_t(CH2)]);
if (commit) _commit();
}
@@ -327,6 +329,7 @@ public:
_cpld_regs->rf1_reg5.set(rm::rf1_reg5_t::SW15_CTRL_CH2, bool2bin(source!=LO_INTERNAL));
_cpld_regs->rf1_reg6.set(rm::rf1_reg6_t::SW16_CTRL_CH2, bool2bin(source==LO_INTERNAL));
_lo1_src[size_t(CH2)] = source;
+ _set_lo1_amp(_chan_enabled[size_t(CH1)], _chan_enabled[size_t(CH2)], _lo1_src[size_t(CH2)]);
}
if (commit) _commit();
}
@@ -497,6 +500,14 @@ private: //Functions
_cpld_regs->rf1_reg7.set(rm::rf1_reg7_t::SW22_CTRL_CH2, bool2bin((lo1_export_src!=LO_CH2_SYNTH)||(cal_mode==CAL_CH2)));
}
+ void _set_lo1_amp(bool ch1_enabled, bool ch2_enabled, lo_source_t ch2_lo1_src)
+ {
+ // AMP_LO1_EN_CH1 also controls the amp for the external LO1 port,
+ // which could be in use by ch2
+ _cpld_regs->rf1_reg1.set(rm::rf1_reg1_t::AMP_LO1_EN_CH1, bool2bin(
+ ch1_enabled || (ch2_enabled && (ch2_lo1_src == LO_EXTERNAL || ch2_lo1_src == LO_REIMPORT))));
+ }
+
void _config_lo1_route(lo_config_route_t source)
{
//Route SPI LEs through CPLD (will not assert them)
@@ -643,6 +654,7 @@ private: //Members
dirty_tracked<bool> _lo2_enable[NUM_CHANS];
lo_export_source_t _lo1_export;
lo_export_source_t _lo2_export;
+ bool _chan_enabled[NUM_CHANS];
};
twinrx_ctrl::sptr twinrx_ctrl::make(