usrp-e100: added readbacks for time now and time pps

incremented fpga compat number
added slave 7 to regs map
removed old copy of regs map

4 files changed, 34 insertions, 3 deletions

diff --git a/host/lib/usrp/usrp_e100/dsp_impl.cpp b/host/lib/usrp/usrp_e100/dsp_impl.cpp
index 43a3bd3be..7d358a607 100644
--- a/host/lib/usrp/usrp_e100/dsp_impl.cpp
+++ b/host/lib/usrp/usrp_e100/dsp_impl.cpp
@@ -38,7 +38,7 @@ void usrp_e100_impl::rx_ddc_init(void){
 
     //initial config and update
     rx_ddc_set(DSP_PROP_FREQ_SHIFT, double(0));
-    rx_ddc_set(DSP_PROP_HOST_RATE, double(64e6/10));
+    rx_ddc_set(DSP_PROP_HOST_RATE, double(16e6));
 }
 
 /***********************************************************************
@@ -121,7 +121,7 @@ void usrp_e100_impl::tx_duc_init(void){
 
     //initial config and update
     tx_duc_set(DSP_PROP_FREQ_SHIFT, double(0));
-    tx_duc_set(DSP_PROP_HOST_RATE, double(64e6/10));
+    tx_duc_set(DSP_PROP_HOST_RATE, double(16e6));
 }
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp_e100/mboard_impl.cpp b/host/lib/usrp/usrp_e100/mboard_impl.cpp
index 2c5699e08..f52d2e6fb 100644
--- a/host/lib/usrp/usrp_e100/mboard_impl.cpp
+++ b/host/lib/usrp/usrp_e100/mboard_impl.cpp
@@ -36,6 +36,11 @@ void usrp_e100_impl::mboard_init(void){
         boost::bind(&usrp_e100_impl::mboard_set, this, _1, _2)
     );
 
+    //set the ticks per seconds into the vita time control
+    _iface->poke32(UE_REG_TIME64_TPS,
+        boost::uint32_t(_clock_ctrl->get_fpga_clock_rate())
+    );
+
     //init the clock config
     _clock_config = clock_config_t::internal();
     update_clock_config();
@@ -131,6 +136,22 @@ void usrp_e100_impl::mboard_get(const wax::obj &key_, wax::obj &val){
         val = _iface->mb_eeprom;
         return;
 
+    case MBOARD_PROP_TIME_NOW: while(true){
+        uint32_t secs = _iface->peek32(UE_REG_RB_TIME_NOW_SECS);
+        uint32_t ticks = _iface->peek32(UE_REG_RB_TIME_NOW_TICKS);
+        if (secs != _iface->peek32(UE_REG_RB_TIME_NOW_SECS)) continue;
+        val = time_spec_t(secs, ticks, _clock_ctrl->get_fpga_clock_rate());
+        return;
+    }
+
+    case MBOARD_PROP_TIME_PPS: while(true){
+        uint32_t secs = _iface->peek32(UE_REG_RB_TIME_PPS_SECS);
+        uint32_t ticks = _iface->peek32(UE_REG_RB_TIME_PPS_TICKS);
+        if (secs != _iface->peek32(UE_REG_RB_TIME_PPS_SECS)) continue;
+        val = time_spec_t(secs, ticks, _clock_ctrl->get_fpga_clock_rate());
+        return;
+    }
+
     default: UHD_THROW_PROP_GET_ERROR();
     }
 }
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
index de158ea5e..864e82099 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.hpp
@@ -30,7 +30,7 @@
 #ifndef INCLUDED_USRP_E100_IMPL_HPP
 #define INCLUDED_USRP_E100_IMPL_HPP
 
-static const boost::uint16_t USRP_E_COMPAT_NUM = 0x02;
+static const boost::uint16_t USRP_E_COMPAT_NUM = 0x03;
 
 //! load an fpga image from a bin file into the usrp-e fpga
 extern void usrp_e100_load_fpga(const std::string &bin_file);
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp b/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp
index 625fb2c35..a57fe5171 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_regs.hpp
@@ -114,6 +114,16 @@
 #define	UE_REG_ATR_FULL_RXSIDE  UE_REG_ATR_BASE + 12
 #define	UE_REG_ATR_FULL_TXSIDE  UE_REG_ATR_BASE + 14
 
+///////////////////////////////////////////////////
+// Slave 7 -- Readback Mux 32
+
+#define UE_REG_RB_MUX_32_BASE  UE_REG_SLAVE(7)
+
+#define UE_REG_RB_TIME_NOW_SECS   UE_REG_RB_MUX_32_BASE + 0
+#define UE_REG_RB_TIME_NOW_TICKS  UE_REG_RB_MUX_32_BASE + 4
+#define UE_REG_RB_TIME_PPS_SECS   UE_REG_RB_MUX_32_BASE + 8
+#define UE_REG_RB_TIME_PPS_TICKS  UE_REG_RB_MUX_32_BASE + 12
+
 /////////////////////////////////////////////////
 // DSP RX Regs
 ////////////////////////////////////////////////