diff options
| author | Thomas Vogel <thomas.vogel@ni.com> | 2018-12-06 14:51:48 +0100 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2018-12-14 14:16:25 -0800 |
| commit | 89868e5010187628ef00f8f4e67d6afdd583bb0c (patch) | |
| tree | d98d3cdf9aa57b074176804152ec540ff4b6d6d0 /host/lib | |
| parent | 1da9ef1d12586cc1fa393c7207a3415a37d1ee8d (diff) | |
| download | uhd-89868e5010187628ef00f8f4e67d6afdd583bb0c.tar.gz uhd-89868e5010187628ef00f8f4e67d6afdd583bb0c.tar.bz2 uhd-89868e5010187628ef00f8f4e67d6afdd583bb0c.zip | |
x300: Add support for USRP-2974
This will enable a USRP 2974 to be registered as an X300 device.
Its product ID is 'NI-2974'.
Diffstat (limited to 'host/lib')
| -rw-r--r-- | host/lib/usrp/x300/x300_impl.cpp | 18 | ||||
| -rw-r--r-- | host/lib/usrp/x300/x300_impl.hpp | 2 | ||||
| -rw-r--r-- | host/lib/usrp/x300/x300_regs.hpp | 1 |
3 files changed, 19 insertions, 2 deletions
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp index d3eeeef10..2e1450efa 100644 --- a/host/lib/usrp/x300/x300_impl.cpp +++ b/host/lib/usrp/x300/x300_impl.cpp @@ -131,6 +131,9 @@ static device_addrs_t x300_find_with_addr(const device_addr_t &hint) case x300_impl::USRP_X310_MB: new_addr["product"] = "X310"; break; + case x300_impl::USRP_X310_MB_NI_2974: + new_addr["product"] = "NI-2974"; + break; default: break; } @@ -188,6 +191,10 @@ static device_addrs_t x300_find_pcie(const device_addr_t &hint, bool explicit_qu case x300_impl::USRP_X310_MB: new_addr["product"] = "X310"; break; + case x300_impl::USRP_X310_MB_NI_2974: + new_addr["product"] = "NI-2974"; + break; + default: continue; } @@ -598,11 +605,12 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr) lvbitx.reset(new x300_lvbitx(dev_addr["fpga"])); break; case USRP_X310_MB: + case USRP_X310_MB_NI_2974: lvbitx.reset(new x310_lvbitx(dev_addr["fpga"])); break; default: nirio_status_to_exception(status, "Motherboard detection error. Please ensure that you \ - have a valid USRP X3x0, NI USRP-294xR or NI USRP-295xR device and that all the device \ + have a valid USRP X3x0, NI USRP-294xR, NI USRP-295xR or NI USRP-2974 device and that all the device \ drivers have loaded successfully."); } //Load the lvbitx onto the device @@ -734,6 +742,9 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr) case USRP_X310_MB: product_name = "X310"; break; + case USRP_X310_MB_NI_2974: + product_name = "NI-2974"; + break; default: if (not mb.args.get_recover_mb_eeprom()) throw uhd::runtime_error("Unrecognized product type.\n" @@ -1870,6 +1881,8 @@ x300_impl::x300_mboard_t x300_impl::get_mb_type_from_pcie(const std::string& res case X310_2954R_40MHz_PCIE_SSID_ADC_18: case X310_2955R_PCIE_SSID_ADC_18: mb_type = USRP_X310_MB; break; + case X310_2974_PCIE_SSID_ADC_18: + mb_type = USRP_X310_MB_NI_2974; break; default: mb_type = UNKNOWN; break; } @@ -1929,6 +1942,9 @@ x300_impl::x300_mboard_t x300_impl::get_mb_type_from_eeprom(const uhd::usrp::mbo case X310_2954R_40MHz_PCIE_SSID_ADC_18: case X310_2955R_PCIE_SSID_ADC_18: mb_type = USRP_X310_MB; break; + case X310_2974_PCIE_SSID_ADC_18: + mb_type = USRP_X310_MB_NI_2974; break; + default: UHD_LOGGER_WARNING("X300") << "X300 unknown product code in EEPROM: " << product_num ; mb_type = UNKNOWN; break; diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp index 20c54c6a7..e05aea32e 100644 --- a/host/lib/usrp/x300/x300_impl.hpp +++ b/host/lib/usrp/x300/x300_impl.hpp @@ -74,7 +74,7 @@ public: static void release(uhd::wb_iface::sptr iface); enum x300_mboard_t { - USRP_X300_MB, USRP_X310_MB, UNKNOWN + USRP_X300_MB, USRP_X310_MB, USRP_X310_MB_NI_2974, UNKNOWN }; static x300_mboard_t get_mb_type_from_pcie(const std::string& resource, const std::string& rpc_port); static x300_mboard_t get_mb_type_from_eeprom(const uhd::usrp::mboard_eeprom_t& mb_eeprom); diff --git a/host/lib/usrp/x300/x300_regs.hpp b/host/lib/usrp/x300/x300_regs.hpp index b54c5c2bb..5fdc89979 100644 --- a/host/lib/usrp/x300/x300_regs.hpp +++ b/host/lib/usrp/x300/x300_regs.hpp @@ -107,6 +107,7 @@ static const uint32_t X310_2953R_40MHz_PCIE_SSID_ADC_18 = 0x7859; static const uint32_t X310_2953R_120MHz_PCIE_SSID_ADC_18 = 0x7860; static const uint32_t X310_2954R_40MHz_PCIE_SSID_ADC_18 = 0x785A; static const uint32_t X310_2955R_PCIE_SSID_ADC_18 = 0x78F0; +static const uint32_t X310_2974_PCIE_SSID_ADC_18 = 0x799B; static const uint32_t FPGA_X3xx_SIG_VALUE = 0x58333030; |