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author | Martin Braun <martin.braun@ettus.com> | 2016-10-26 17:28:00 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2016-10-26 17:28:00 -0700 |
commit | 248377a1db9f2761fd984528cde11ab66555ebfb (patch) | |
tree | 1c638c0affb9b3154d288b74428cd5a912edd24a /host/lib | |
parent | f386a2805b1cda04eef8c2ba1a3c680edf28c2a6 (diff) | |
parent | 9517de45709adaea8b574011573a565007149d5d (diff) | |
download | uhd-248377a1db9f2761fd984528cde11ab66555ebfb.tar.gz uhd-248377a1db9f2761fd984528cde11ab66555ebfb.tar.bz2 uhd-248377a1db9f2761fd984528cde11ab66555ebfb.zip |
Merge branch 'maint'
Diffstat (limited to 'host/lib')
-rw-r--r-- | host/lib/experts/expert_nodes.hpp | 9 | ||||
-rw-r--r-- | host/lib/rfnoc/rx_stream_terminator.cpp | 1 | ||||
-rw-r--r-- | host/lib/rfnoc/tx_stream_terminator.cpp | 2 | ||||
-rwxr-xr-x | host/lib/transport/nirio/lvbitx/process-lvbitx.py | 12 | ||||
-rw-r--r-- | host/lib/usrp/x300/x300_impl.hpp | 5 |
5 files changed, 21 insertions, 8 deletions
diff --git a/host/lib/experts/expert_nodes.hpp b/host/lib/experts/expert_nodes.hpp index dc5cc934b..a704023a3 100644 --- a/host/lib/experts/expert_nodes.hpp +++ b/host/lib/experts/expert_nodes.hpp @@ -21,6 +21,7 @@ #include <uhd/config.hpp> #include <uhd/exception.hpp> #include <uhd/utils/dirty_tracked.hpp> +#include <uhd/types/time_spec.hpp> #include <boost/function.hpp> #include <boost/foreach.hpp> #include <boost/thread/recursive_mutex.hpp> @@ -98,6 +99,12 @@ namespace uhd { namespace experts { os << int(val); return os.str(); } + + static std::string print(const time_spec_t time) { + std::ostringstream os; + os << time.get_real_secs(); + return os.str(); + } }; /*!--------------------------------------------------------- @@ -387,7 +394,7 @@ namespace uhd { namespace experts { * class worker_node_t * * A node class to implement a function that consumes - * zero or more input data nodes and emits zeroor more output + * zero or more input data nodes and emits zero or more output * data nodes. The worker can also operate on other non-expert * interfaces because worker_node_t is abstract and the client * is required to implement the "resolve" method in a subclass. diff --git a/host/lib/rfnoc/rx_stream_terminator.cpp b/host/lib/rfnoc/rx_stream_terminator.cpp index b2a2d5a64..43b3664fc 100644 --- a/host/lib/rfnoc/rx_stream_terminator.cpp +++ b/host/lib/rfnoc/rx_stream_terminator.cpp @@ -58,6 +58,7 @@ void rx_stream_terminator::set_rx_streamer(bool active, const size_t) get_upstream_port(upstream_node.first) ); } + _rx_streamer_active[upstream_node.first] = active; } } diff --git a/host/lib/rfnoc/tx_stream_terminator.cpp b/host/lib/rfnoc/tx_stream_terminator.cpp index 2746fc4d8..ee856843d 100644 --- a/host/lib/rfnoc/tx_stream_terminator.cpp +++ b/host/lib/rfnoc/tx_stream_terminator.cpp @@ -54,7 +54,9 @@ void tx_stream_terminator::set_tx_streamer(bool active, const size_t /* port */) get_downstream_port(downstream_node.first) ); } + _tx_streamer_active[downstream_node.first] = active; } + } tx_stream_terminator::~tx_stream_terminator() diff --git a/host/lib/transport/nirio/lvbitx/process-lvbitx.py b/host/lib/transport/nirio/lvbitx/process-lvbitx.py index 7887c3997..8b06cb01c 100755 --- a/host/lib/transport/nirio/lvbitx/process-lvbitx.py +++ b/host/lib/transport/nirio/lvbitx/process-lvbitx.py @@ -39,14 +39,14 @@ if (len(args) < 1): sys.exit(1) lvbitx_filename = args[0] -input_filename = os.path.abspath(lvbitx_filename) -autogen_src_path = os.path.abspath(options.output_src_path) if (options.output_src_path is not None) else os.path.dirname(input_filename) +input_filename = os.path.relpath(lvbitx_filename) +autogen_src_path = os.path.relpath(options.output_src_path) if (options.output_src_path is not None) else os.path.dirname(input_filename) class_name = os.path.splitext(os.path.basename(input_filename))[0] if (not os.path.isfile(input_filename)): print('ERROR: FPGA File ' + input_filename + ' could not be accessed or is not a file.') sys.exit(1) -if (options.merge_bin is not None and not os.path.isfile(os.path.abspath(options.merge_bin))): +if (options.merge_bin is not None and not os.path.isfile(os.path.relpath(options.merge_bin))): print('ERROR: FPGA Bin File ' + options.merge_bin + ' could not be accessed or is not a file.') sys.exit(1) if (not os.path.exists(autogen_src_path)): @@ -171,7 +171,7 @@ codegen_transform['in_fifo_list'] = in_fifo_list # Merge bitstream into LVBITX if (options.merge_bin is not None): - with open(os.path.abspath(options.merge_bin), 'rb') as bin_file: + with open(os.path.relpath(options.merge_bin), 'rb') as bin_file: bitstream = bin_file.read() bitstream_md5 = hashlib.md5(bitstream).hexdigest() bitstream_b64 = base64.b64encode(bitstream) @@ -199,12 +199,12 @@ if (options.output_lvbitx_path is not None): tree.write(os.path.join(options.output_lvbitx_path, class_name + '_fpga.lvbitx'), encoding="utf-8", xml_declaration=True, default_namespace=None, method="xml") # Save HPP and CPP -with open(os.path.join(os.path.dirname(os.path.abspath(__file__)), 'template_lvbitx.hpp'), 'r') as template_file: +with open(os.path.join(os.path.dirname(os.path.relpath(__file__)), 'template_lvbitx.hpp'), 'r') as template_file: template_string = template_file.read() with open(os.path.join(autogen_src_path, class_name + '_lvbitx.hpp'), 'w') as source_file: source_file.write(template_string.format(**codegen_transform)) -with open(os.path.join(os.path.dirname(os.path.abspath(__file__)), 'template_lvbitx.cpp'), 'r') as template_file: +with open(os.path.join(os.path.dirname(os.path.relpath(__file__)), 'template_lvbitx.cpp'), 'r') as template_file: template_string = template_file.read() with open(os.path.join(autogen_src_path, class_name + '_lvbitx.cpp'), 'w') as source_file: source_file.write(template_string.format(**codegen_transform)) diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp index ee42dcf3e..5d3fa4fed 100644 --- a/host/lib/usrp/x300/x300_impl.hpp +++ b/host/lib/usrp/x300/x300_impl.hpp @@ -54,7 +54,10 @@ static const size_t X300_RX_SW_BUFF_SIZE_ETH_MACOS = 0x100000; //1Mib //where an element is 8 bytes. For best throughput ensure that the data frame fits in these buffers. //Also ensure that the kernel has enough frames to hold buffered TX and RX data static const size_t X300_PCIE_RX_DATA_FRAME_SIZE = 8184; //bytes -static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 8192; //bytes +//static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 8192; //bytes +// This is a temporary solution: We're throttling PCIe MTU to avoid +// underruns on Tx. Once we solve it on the FPGA side, need revert this commit. +static const size_t X300_PCIE_TX_DATA_FRAME_SIZE = 3000; //bytes static const size_t X300_PCIE_DATA_NUM_FRAMES = 2048; static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes static const size_t X300_PCIE_MSG_NUM_FRAMES = 64; |