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| author | Nicolas Cuervo <nicolas.cuervo@ettus.com> | 2016-10-05 20:21:25 -0700 |
|---|---|---|
| committer | mbr0wn <martin.braun@ettus.com> | 2016-10-07 14:00:13 -0700 |
| commit | 006c321c552781501bcb0cff9e156c991c24ce45 (patch) | |
| tree | 0e81458ed801910a3c6d261b24069a3aa73ceab3 /host/lib | |
| parent | 90a2ce4432222e252a08485f98ad6fea7ed662c5 (diff) | |
| download | uhd-006c321c552781501bcb0cff9e156c991c24ce45.tar.gz uhd-006c321c552781501bcb0cff9e156c991c24ce45.tar.bz2 uhd-006c321c552781501bcb0cff9e156c991c24ce45.zip | |
UBX: changed default performance parameters
Diffstat (limited to 'host/lib')
| -rw-r--r-- | host/lib/usrp/dboard/db_ubx.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/host/lib/usrp/dboard/db_ubx.cpp b/host/lib/usrp/dboard/db_ubx.cpp index 7416de735..05a02c321 100644 --- a/host/lib/usrp/dboard/db_ubx.cpp +++ b/host/lib/usrp/dboard/db_ubx.cpp @@ -1146,17 +1146,17 @@ private: set_cpld_field(RXLNA1_FORCEON, 1); set_cpld_field(RXLNA2_FORCEON, 1); - /* // Placeholders in case some components need to be forced on to // reduce settling time. Note that some FORCEON lines are still gated // by other bits in the CPLD register are are asserted during // frequency tuning. - set_cpld_field(RXAMP_FORCEON, 0); - set_cpld_field(RXDEMOD_FORCEON, 0); + set_cpld_field(RXAMP_FORCEON, 1); + set_cpld_field(RXDEMOD_FORCEON, 1); set_cpld_field(RXDRV_FORCEON, 0); set_cpld_field(RXMIXER_FORCEON, 0); - set_cpld_field(RXLO1_FORCEON, 0); - set_cpld_field(RXLO2_FORCEON, 0); + set_cpld_field(RXLO1_FORCEON, 1); + set_cpld_field(RXLO2_FORCEON, 1); + /* //set_cpld_field(TXDRV_FORCEON, 1); // controlled by RX antenna selection set_cpld_field(TXMOD_FORCEON, 0); set_cpld_field(TXMIXER_FORCEON, 0); |