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authorAshish Chaudhari <ashish@ettus.com>2014-08-01 16:29:34 -0700
committerAshish Chaudhari <ashish@ettus.com>2014-08-01 16:29:34 -0700
commitdb6f3a2d7aabdd0eaa1021ac174edd3cbb77be55 (patch)
treea46e395a5700fda1a367ec34b640312b4ff48e3f /host/lib
parentef5abde4f0c5ef5a16dc7b8ec7a8a5f611a9418f (diff)
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b200: Added variable rate SPI core for AD9361 and ADF4001
- Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/usrp/b200/CMakeLists.txt1
-rw-r--r--host/lib/usrp/b200/b200_cores.cpp83
-rw-r--r--host/lib/usrp/b200/b200_cores.hpp66
-rw-r--r--host/lib/usrp/b200/b200_impl.cpp6
-rw-r--r--host/lib/usrp/b200/b200_impl.hpp3
-rw-r--r--host/lib/usrp/b200/b200_regs.hpp1
-rw-r--r--host/lib/usrp/common/adf4001_ctrl.cpp2
-rw-r--r--host/lib/usrp/common/adf4001_ctrl.hpp5
8 files changed, 159 insertions, 8 deletions
diff --git a/host/lib/usrp/b200/CMakeLists.txt b/host/lib/usrp/b200/CMakeLists.txt
index 3d8aad052..a08c4bd03 100644
--- a/host/lib/usrp/b200/CMakeLists.txt
+++ b/host/lib/usrp/b200/CMakeLists.txt
@@ -30,5 +30,6 @@ IF(ENABLE_B200)
${CMAKE_CURRENT_SOURCE_DIR}/b200_iface.cpp
${CMAKE_CURRENT_SOURCE_DIR}/b200_io_impl.cpp
${CMAKE_CURRENT_SOURCE_DIR}/b200_uart.cpp
+ ${CMAKE_CURRENT_SOURCE_DIR}/b200_cores.cpp
)
ENDIF(ENABLE_B200)
diff --git a/host/lib/usrp/b200/b200_cores.cpp b/host/lib/usrp/b200/b200_cores.cpp
new file mode 100644
index 000000000..19e637ef4
--- /dev/null
+++ b/host/lib/usrp/b200/b200_cores.cpp
@@ -0,0 +1,83 @@
+//
+// Copyright 2013-2014 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "b200_cores.hpp"
+#include "b200_regs.hpp"
+#include "b200_impl.hpp"
+
+b200_local_spi_core::b200_local_spi_core(
+ uhd::wb_iface::sptr iface,
+ perif_t default_perif) :
+ _spi_core(spi_core_3000::make(iface, TOREG(SR_CORE_SPI), RB32_CORE_SPI)),
+ _current_perif(default_perif),
+ _last_perif(default_perif)
+{
+ change_perif(default_perif);
+}
+
+boost::uint32_t b200_local_spi_core::transact_spi(
+ int which_slave,
+ const uhd::spi_config_t &config,
+ boost::uint32_t data,
+ size_t num_bits,
+ bool readback)
+{
+ boost::mutex::scoped_lock lock(_mutex);
+ return _spi_core->transact_spi(which_slave, config, data, num_bits, readback);
+}
+
+void b200_local_spi_core::change_perif(perif_t perif)
+{
+ boost::mutex::scoped_lock lock(_mutex);
+ _last_perif = _current_perif;
+ _current_perif = perif;
+
+ switch (_current_perif) {
+ case CODEC:
+ _spi_core->set_divider(B200_BUS_CLOCK_RATE/AD9361_SPI_RATE);
+ break;
+ case PLL:
+ _spi_core->set_divider(B200_BUS_CLOCK_RATE/ADF4001_SPI_RATE);
+ break;
+ }
+}
+
+void b200_local_spi_core::restore_perif()
+{
+ change_perif(_last_perif);
+}
+
+b200_ref_pll_ctrl::b200_ref_pll_ctrl(b200_local_spi_core::sptr spi) :
+ uhd::usrp::adf4001_ctrl(spi, ADF4001_SLAVENO),
+ _spi(spi)
+{
+}
+
+void b200_ref_pll_ctrl::set_lock_to_ext_ref(bool external)
+{
+ _spi->change_perif(b200_local_spi_core::PLL);
+ adf4001_ctrl::set_lock_to_ext_ref(external);
+ _spi->restore_perif();
+}
+
+
+b200_local_spi_core::sptr b200_local_spi_core::make(
+ uhd::wb_iface::sptr iface, b200_local_spi_core::perif_t default_perif)
+{
+ return sptr(new b200_local_spi_core(iface, default_perif));
+}
+
diff --git a/host/lib/usrp/b200/b200_cores.hpp b/host/lib/usrp/b200/b200_cores.hpp
new file mode 100644
index 000000000..8a8900412
--- /dev/null
+++ b/host/lib/usrp/b200/b200_cores.hpp
@@ -0,0 +1,66 @@
+//
+// Copyright 2013-2014 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_B200_CORES_HPP
+#define INCLUDED_B200_CORES_HPP
+
+#include "spi_core_3000.hpp"
+#include "adf4001_ctrl.hpp"
+#include <boost/thread/mutex.hpp>
+
+class b200_local_spi_core : boost::noncopyable, public uhd::spi_iface {
+
+public:
+ typedef boost::shared_ptr<b200_local_spi_core> sptr;
+
+ enum perif_t {
+ CODEC, PLL
+ };
+
+ b200_local_spi_core(uhd::wb_iface::sptr iface, perif_t default_perif);
+
+ virtual boost::uint32_t transact_spi(
+ int which_slave,
+ const uhd::spi_config_t &config,
+ boost::uint32_t data,
+ size_t num_bits,
+ bool readback);
+
+ void change_perif(perif_t perif);
+ void restore_perif();
+
+ static sptr make(uhd::wb_iface::sptr iface, perif_t default_perif = CODEC);
+
+private:
+ spi_core_3000::sptr _spi_core;
+ perif_t _current_perif;
+ perif_t _last_perif;
+ boost::mutex _mutex;
+};
+
+class b200_ref_pll_ctrl : public uhd::usrp::adf4001_ctrl {
+public:
+ typedef boost::shared_ptr<b200_ref_pll_ctrl> sptr;
+
+ b200_ref_pll_ctrl(b200_local_spi_core::sptr spi);
+ void set_lock_to_ext_ref(bool external);
+
+private:
+ b200_local_spi_core::sptr _spi;
+};
+
+#endif /* INCLUDED_B200_CORES_HPP */
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 04cb8062e..7c85176ef 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -31,6 +31,7 @@
#include <boost/thread/thread.hpp>
#include <boost/lexical_cast.hpp>
#include <boost/functional/hash.hpp>
+#include <boost/make_shared.hpp>
#include <cstdio>
#include <ctime>
#include <cmath>
@@ -341,9 +342,8 @@ b200_impl::b200_impl(const device_addr_t &device_addr)
////////////////////////////////////////////////////////////////////
// create time and clock control objects
////////////////////////////////////////////////////////////////////
- _spi_iface = spi_core_3000::make(_local_ctrl, TOREG(SR_CORE_SPI), RB32_CORE_SPI);
- _spi_iface->set_divider(B200_BUS_CLOCK_RATE/ADF4001_SPI_RATE);
- _adf4001_iface = boost::shared_ptr<adf4001_ctrl>(new adf4001_ctrl(_spi_iface, ADF4001_SLAVENO));
+ _spi_iface = b200_local_spi_core::make(_local_ctrl);
+ _adf4001_iface = boost::make_shared<b200_ref_pll_ctrl>(_spi_iface);
////////////////////////////////////////////////////////////////////
// Init codec - turns on clocks
diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp
index b319c230c..5177e295f 100644
--- a/host/lib/usrp/b200/b200_impl.hpp
+++ b/host/lib/usrp/b200/b200_impl.hpp
@@ -20,6 +20,7 @@
#include "b200_iface.hpp"
#include "b200_uart.hpp"
+#include "b200_cores.hpp"
#include "ad9361_ctrl.hpp"
#include "adf4001_ctrl.hpp"
#include "rx_vita_core_3000.hpp"
@@ -100,7 +101,7 @@ private:
b200_iface::sptr _iface;
radio_ctrl_core_3000::sptr _local_ctrl;
ad9361_ctrl::sptr _codec_ctrl;
- spi_core_3000::sptr _spi_iface;
+ b200_local_spi_core::sptr _spi_iface;
boost::shared_ptr<uhd::usrp::adf4001_ctrl> _adf4001_iface;
uhd::gps_ctrl::sptr _gps;
diff --git a/host/lib/usrp/b200/b200_regs.hpp b/host/lib/usrp/b200/b200_regs.hpp
index 2f4373409..dc8a6b0dc 100644
--- a/host/lib/usrp/b200/b200_regs.hpp
+++ b/host/lib/usrp/b200/b200_regs.hpp
@@ -54,6 +54,7 @@ localparam RB64_CODEC_READBACK = 24;
//pll constants
static const int AD9361_SLAVENO = (1 << 0);
static const int ADF4001_SLAVENO = (1 << 1);
+static const double AD9361_SPI_RATE = 1e6;
static const double ADF4001_SPI_RATE = 10e3; //slow for large time constant on spi lines
/* ATR Control Bits */
diff --git a/host/lib/usrp/common/adf4001_ctrl.cpp b/host/lib/usrp/common/adf4001_ctrl.cpp
index 46171c7ce..a7510c272 100644
--- a/host/lib/usrp/common/adf4001_ctrl.cpp
+++ b/host/lib/usrp/common/adf4001_ctrl.cpp
@@ -93,7 +93,7 @@ boost::uint32_t adf4001_regs_t::get_reg(boost::uint8_t addr) {
}
-adf4001_ctrl::adf4001_ctrl(spi_core_3000::sptr _spi, int slaveno):
+adf4001_ctrl::adf4001_ctrl(uhd::spi_iface::sptr _spi, int slaveno):
spi_iface(_spi),
slaveno(slaveno)
{
diff --git a/host/lib/usrp/common/adf4001_ctrl.hpp b/host/lib/usrp/common/adf4001_ctrl.hpp
index a16cff3fa..9ea3caf1a 100644
--- a/host/lib/usrp/common/adf4001_ctrl.hpp
+++ b/host/lib/usrp/common/adf4001_ctrl.hpp
@@ -123,12 +123,11 @@ public:
class adf4001_ctrl {
public:
-
- adf4001_ctrl(spi_core_3000::sptr _spi, int slaveno);
+ adf4001_ctrl(uhd::spi_iface::sptr _spi, int slaveno);
void set_lock_to_ext_ref(bool external);
private:
- spi_core_3000::sptr spi_iface;
+ uhd::spi_iface::sptr spi_iface;
int slaveno;
spi_config_t spi_config;
adf4001_regs_t adf4001_regs;