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authorJosh Blum <josh@joshknows.com>2012-04-09 17:29:56 -0700
committerJosh Blum <josh@joshknows.com>2012-04-09 17:29:56 -0700
commitc402ed8c0c1266f141471189941cdbd24ad4e6ed (patch)
tree6bbec10a3566b441a7356692465db0ce4b269945 /host/lib
parentbd3eeb5149efe5f9ca3e5b83b46cdb37f279d3d5 (diff)
parent1e143bddd2a246ca6ffae6fb54aa416b35293078 (diff)
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Merge branch 'maint'
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/usrp/cores/rx_dsp_core_200.cpp6
-rw-r--r--host/lib/usrp/multi_usrp.cpp4
2 files changed, 4 insertions, 6 deletions
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp
index 4b60f111c..cf8db1927 100644
--- a/host/lib/usrp/cores/rx_dsp_core_200.cpp
+++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp
@@ -38,13 +38,12 @@
#define REG_RX_CTRL_STREAM_CMD _ctrl_base + 0
#define REG_RX_CTRL_TIME_HI _ctrl_base + 4
#define REG_RX_CTRL_TIME_LO _ctrl_base + 8
-#define REG_RX_CTRL_CLEAR _ctrl_base + 12
+#define REG_RX_CTRL_FORMAT _ctrl_base + 12
#define REG_RX_CTRL_VRT_HDR _ctrl_base + 16
#define REG_RX_CTRL_VRT_SID _ctrl_base + 20
#define REG_RX_CTRL_VRT_TLR _ctrl_base + 24
#define REG_RX_CTRL_NSAMPS_PP _ctrl_base + 28
#define REG_RX_CTRL_NCHANNELS _ctrl_base + 32
-#define REG_RX_CTRL_FORMAT REG_RX_CTRL_CLEAR //re-use clear address
template <class T> T ceil_log2(T num){
return std::ceil(std::log(num)/std::log(T(2)));
@@ -78,8 +77,7 @@ public:
}
void clear(void){
- _iface->poke32(REG_RX_CTRL_CLEAR, 1); //reset
- _iface->poke32(REG_RX_CTRL_NCHANNELS, 1);
+ _iface->poke32(REG_RX_CTRL_NCHANNELS, 1); //also reset
_iface->poke32(REG_RX_CTRL_VRT_HDR, 0
| (0x1 << 28) //if data with stream id
| (0x1 << 26) //has trailer
diff --git a/host/lib/usrp/multi_usrp.cpp b/host/lib/usrp/multi_usrp.cpp
index c6ff9d437..39f9cb490 100644
--- a/host/lib/usrp/multi_usrp.cpp
+++ b/host/lib/usrp/multi_usrp.cpp
@@ -425,8 +425,8 @@ public:
std::string clock_source;
switch(clock_config.ref_source){
case clock_config_t::REF_INT: clock_source = "internal"; break;
- case clock_config_t::PPS_SMA: clock_source = "external"; break;
- case clock_config_t::PPS_MIMO: clock_source = "mimo"; break;
+ case clock_config_t::REF_SMA: clock_source = "external"; break;
+ case clock_config_t::REF_MIMO: clock_source = "mimo"; break;
default: clock_source = "unknown";
}
this->set_clock_source(clock_source, mboard);