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authorJosh Blum <josh@joshknows.com>2010-04-13 14:23:36 -0700
committerJosh Blum <josh@joshknows.com>2010-04-13 14:23:36 -0700
commit5b5696cbb747c87775b8e90059c951ac51ddca5a (patch)
tree9f6d61da6ab2ba9097b6c81867de1cf392f8cdfe /host/lib
parentad0d641b38dd79cc29b4ca7a3a02c02e35eb8f71 (diff)
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added more clock config, takes care of external reference
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/usrp/usrp2/clock_control.cpp40
-rw-r--r--host/lib/usrp/usrp2/clock_control.hpp6
-rw-r--r--host/lib/usrp/usrp2/mboard_impl.cpp11
-rw-r--r--host/lib/usrp/usrp2/usrp2_regs.hpp5
4 files changed, 61 insertions, 1 deletions
diff --git a/host/lib/usrp/usrp2/clock_control.cpp b/host/lib/usrp/usrp2/clock_control.cpp
index 74db5958a..4acc1bf29 100644
--- a/host/lib/usrp/usrp2/clock_control.cpp
+++ b/host/lib/usrp/usrp2/clock_control.cpp
@@ -30,6 +30,32 @@ class clock_control_ad9510 : public clock_control{
public:
clock_control_ad9510(usrp2_impl *impl){
_impl = impl;
+
+ _ad9510_regs.cp_current_setting = ad9510_regs_t::CP_CURRENT_SETTING_3_0MA;
+ this->write_reg(0x09);
+
+ //100mhz = 10mhz/R * (P*B + A)
+
+ _ad9510_regs.pll_power_down = ad9510_regs_t::PLL_POWER_DOWN_NORMAL;
+ _ad9510_regs.prescaler_value = ad9510_regs_t::PRESCALER_VALUE_DIV2;
+ this->write_reg(0x0A);
+
+ _ad9510_regs.acounter = 0;
+ this->write_reg(0x04);
+
+ _ad9510_regs.bcounter_msb = 0;
+ _ad9510_regs.bcounter_lsb = 5;
+ this->write_reg(0x05);
+ this->write_reg(0x06);
+
+ _ad9510_regs.ref_counter_msb = 0;
+ _ad9510_regs.ref_counter_lsb = 1; // r divider = 1
+ this->write_reg(0x0B);
+ this->write_reg(0x0C);
+
+ /* regs will be updated in commands below */
+
+ this->enable_external_ref(false);
this->enable_rx_dboard_clock(false);
this->enable_tx_dboard_clock(false);
}
@@ -54,6 +80,20 @@ public:
this->update_regs();
}
+ /*!
+ * If we are to use an external reference, enable the charge pump.
+ * \param enb true to enable the CP
+ */
+ void enable_external_ref(bool enb){
+ _ad9510_regs.charge_pump_mode = (enb)?
+ ad9510_regs_t::CHARGE_PUMP_MODE_NORMAL :
+ ad9510_regs_t::CHARGE_PUMP_MODE_3STATE ;
+ _ad9510_regs.pll_mux_control = ad9510_regs_t::PLL_MUX_CONTROL_DLD_HIGH;
+ _ad9510_regs.pfd_polarity = ad9510_regs_t::PFD_POLARITY_POS;
+ this->write_reg(0x08);
+ this->update_regs();
+ }
+
private:
/*!
* Write a single register to the spi regs.
diff --git a/host/lib/usrp/usrp2/clock_control.hpp b/host/lib/usrp/usrp2/clock_control.hpp
index 366e09c28..4302941f0 100644
--- a/host/lib/usrp/usrp2/clock_control.hpp
+++ b/host/lib/usrp/usrp2/clock_control.hpp
@@ -47,6 +47,12 @@ public:
virtual void enable_tx_dboard_clock(bool enb) = 0;
/*!
+ * Enable/disable external reference.
+ * \param enb true to enable
+ */
+ virtual void enable_external_ref(bool enb) = 0;
+
+ /*!
* TODO other clock control api here....
*/
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index faa34d0b3..4361e45cd 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -71,7 +71,16 @@ void usrp2_impl::update_clock_config(void){
//set the pps flags
this->poke32(FR_TIME64_FLAGS, pps_flags);
- //TODO clock source ref 10mhz (spi ad9510)
+ //clock source ref 10mhz
+ switch(_clock_config.ref_source){
+ case clock_config_t::REF_INT : this->poke32(FR_CLOCK_CONTROL, 0x10); break;
+ case clock_config_t::REF_SMA : this->poke32(FR_CLOCK_CONTROL, 0x1C); break;
+ case clock_config_t::REF_MIMO: this->poke32(FR_CLOCK_CONTROL, 0x15); break;
+ }
+
+ //clock source ref 10mhz
+ bool use_external = _clock_config.ref_source != clock_config_t::REF_INT;
+ this->get_clock_control()->enable_external_ref(use_external);
}
void usrp2_impl::set_time_spec(const time_spec_t &time_spec, bool now){
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 77d9f4ad9..0e2a18756 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -62,6 +62,11 @@
#define SPI_SS_TX_DB 128
/////////////////////////////////////////////////
+// Misc Control
+////////////////////////////////////////////////
+#define FR_CLOCK_CONTROL _SR_ADDR(0)
+
+/////////////////////////////////////////////////
// VITA49 64 bit time (write only)
////////////////////////////////////////////////
/*!