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author | Jason Abele <jason@ettus.com> | 2010-10-08 17:03:27 -0700 |
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committer | Jason Abele <jason@ettus.com> | 2010-10-08 17:40:20 -0700 |
commit | 86d6bceb0d37197d0fd8ace19fdedc957c5dfb84 (patch) | |
tree | fd8393d30bd082fcffb12a5c3603e14532c7a387 /host/lib | |
parent | 58e1ca09772408d5d18ee219146fe57d2045c496 (diff) | |
download | uhd-86d6bceb0d37197d0fd8ace19fdedc957c5dfb84.tar.gz uhd-86d6bceb0d37197d0fd8ace19fdedc957c5dfb84.tar.bz2 uhd-86d6bceb0d37197d0fd8ace19fdedc957c5dfb84.zip |
Fixed Assertions to better document tuning failures
Diffstat (limited to 'host/lib')
-rw-r--r-- | host/lib/usrp/dboard/db_dbsrx.cpp | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/host/lib/usrp/dboard/db_dbsrx.cpp b/host/lib/usrp/dboard/db_dbsrx.cpp index 23cafea53..327cb5f75 100644 --- a/host/lib/usrp/dboard/db_dbsrx.cpp +++ b/host/lib/usrp/dboard/db_dbsrx.cpp @@ -277,15 +277,17 @@ void dbsrx::set_lo_freq(double target_freq){ } } - //Assert because we failed to find a suitable combination of ref_clock, R and N - UHD_ASSERT_THROW(ref_clock/(1 << m) < 1e6 or ref_clock/(1 << m) > 2.5e6); - UHD_ASSERT_THROW((pfd_freq < dbsrx_pfd_freq_range.min) or (pfd_freq > dbsrx_pfd_freq_range.max)); - UHD_ASSERT_THROW((N < 256) or (N > 32768)); done_loop: + //Assert because we failed to find a suitable combination of ref_clock, R and N + UHD_ASSERT_THROW(ref_clock < 27.0e6 and ref_clock > 0.0); + UHD_ASSERT_THROW(ref_clock/m > 1e6 and ref_clock/m < 2.5e6); + UHD_ASSERT_THROW((pfd_freq > dbsrx_pfd_freq_range.min) and (pfd_freq < dbsrx_pfd_freq_range.max)); + UHD_ASSERT_THROW((N > 256) and (N < 32768)); + if(dbsrx_debug) std::cerr << boost::format( - "DBSRX: choose ref_clock %f and m_divider %d" - ) % (this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX)) % m << std::endl; + "DBSRX: choose ref_clock (current: %f, new: %f) and m_divider %d" + ) % (this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX)) % ref_clock % m << std::endl; //if ref_clock or m divider changed, we need to update the filter settings if (ref_clock != this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX) or m != _max2118_write_regs.m_divider) update_filter_settings = true; |