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authorJason Abele <jason@ettus.com>2010-08-02 12:56:43 -0700
committerJason Abele <jason@ettus.com>2010-11-05 20:11:26 -0700
commit316423a8bb3c453bae249fcdec3a44e38bd45a6f (patch)
tree4de72a1c684aee7fee60ea4b7f3829fe406f384c /host/lib
parent9d50dea1c2f884835b606ccaa1444e5de96926cb (diff)
downloaduhd-316423a8bb3c453bae249fcdec3a44e38bd45a6f.tar.gz
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Working DBSRX2 daughterboard code
Diffstat (limited to 'host/lib')
-rw-r--r--host/lib/ic_reg_maps/CMakeLists.txt5
-rwxr-xr-xhost/lib/ic_reg_maps/gen_max2112_regs.py181
-rw-r--r--host/lib/usrp/dboard/CMakeLists.txt1
-rw-r--r--host/lib/usrp/dboard/db_dbsrx2.cpp454
4 files changed, 641 insertions, 0 deletions
diff --git a/host/lib/ic_reg_maps/CMakeLists.txt b/host/lib/ic_reg_maps/CMakeLists.txt
index 25f34a280..36e16ebd5 100644
--- a/host/lib/ic_reg_maps/CMakeLists.txt
+++ b/host/lib/ic_reg_maps/CMakeLists.txt
@@ -60,6 +60,11 @@ LIBUHD_PYTHON_GEN_SOURCE(
)
LIBUHD_PYTHON_GEN_SOURCE(
+ ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_max2112_regs.py
+ ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/max2112_regs.hpp
+)
+
+LIBUHD_PYTHON_GEN_SOURCE(
${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad9862_regs.py
${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad9862_regs.hpp
)
diff --git a/host/lib/ic_reg_maps/gen_max2112_regs.py b/host/lib/ic_reg_maps/gen_max2112_regs.py
new file mode 100755
index 000000000..c2fc4e3e2
--- /dev/null
+++ b/host/lib/ic_reg_maps/gen_max2112_regs.py
@@ -0,0 +1,181 @@
+#!/usr/bin/env python
+#
+# Copyright 2010 Ettus Research LLC
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+########################################################################
+# Template for raw text data describing write registers
+# name addr[bit range inclusive] default optional enums
+########################################################################
+WRITE_REGS_TMPL="""\
+########################################################################
+## Note: offsets given from perspective of data bits (excludes address)
+########################################################################
+##
+########################################################################
+## N-Divider MSB (0) Write
+########################################################################
+frac 0[7] 1 invalid, frac
+n_divider_msb 0[0:6] 0
+########################################################################
+## N-Divider LSB (1) Write
+########################################################################
+n_divider_lsb 1[0:7] 0x23
+~n_divider n_divider_lsb, n_divider_msb
+########################################################################
+## Charge Pump (2) Write
+########################################################################
+cpmp 2[6:7] 0
+cplin 2[4:5] 1
+f_divider_mmsb 2[0:3] 0x2
+########################################################################
+## F-Divider MSB (3) Write
+########################################################################
+f_divider_msb 3[0:7] 0xF6
+########################################################################
+## F-Divider LSB (4) Write
+########################################################################
+f_divider_lsb 4[0:7] 0x84
+~f_divider f_divider_lsb, f_divider_msb, f_divider_mmsb
+########################################################################
+## XTAL-Divider R-Divider (5) Write
+########################################################################
+#set $xtal_divider_names = ', '.join(map(lambda x: 'div' + str(x), range(1,9)))
+xtal_divider 5[5:7] 0 $xtal_divider_names
+r_divider 5[0:4] 1
+########################################################################
+## PLL (6) Write
+########################################################################
+d24 6[7] 1 div2, div4 ## div2 for LO <= 1125M, div4 > 1125M
+cps 6[6] 1 i_cp_from_icp, i_cp_from_vas
+icp 6[5] 0 i_cp_600ua, i_cp_1200ua
+##reserved 6[0:4] 0
+########################################################################
+## VCO (7) Write
+########################################################################
+vco 7[3:7] 0x19
+vas 7[2] 1 disabled, enabled
+adl 7[1] 1 disabled, enabled
+ade 7[0] 1 disabled, enabled
+########################################################################
+## LPF (8) Write
+########################################################################
+lp 8[0:7] 0x4B ## map(lambda x: "%0.2f"%((4e6 + (x - 12) * 290e3)/1e6), range(255)) in MHz
+########################################################################
+## Control (9) Write
+########################################################################
+stby 9[7] 0 normal, disable_sig_and_synth
+##reserved 9[6] 0
+pwdn 9[5] 0 normal, invalid
+##reserved 9[4] 0
+bbg 9[0:3] 0 ## Baseband Gain in dB
+########################################################################
+## Shutdown (0xA) Write
+########################################################################
+##reserved 0xA[7] 0
+pll_shutdown 0xA[6] 0 normal, shutdown
+div_shutdown 0xA[5] 0 normal, shutdown
+vco_shutdown 0xA[4] 0 normal, shutdown
+bb_shutdown 0xA[3] 0 normal, shutdown
+rfmix_shutdown 0xA[2] 0 normal, shutdown
+rfvga_shutdown 0xA[1] 0 normal, shutdown
+fe_shutdown 0xA[0] 0 normal, shutdown
+########################################################################
+## Test (0xB) Write
+########################################################################
+cptst 0xB[5:7] 0
+##reserved 0xB[4] 0
+turbo 0xB[3] 1
+ld_mux 0xB[0:2] 0 refout=0, invalid
+"""
+
+########################################################################
+# Template for raw text data describing read registers
+# name addr[bit range inclusive] default optional enums
+########################################################################
+READ_REGS_TMPL="""\
+########################################################################
+## Status Byte-1 (0xC) Read
+########################################################################
+por 0xC[7] 0 read, reset
+vasa 0xC[6] 0 vas_fail, vas_win
+vase 0xC[5] 0 active, inactive
+ld 0xC[4] 0 unlocked, locked
+##reserved 0xC[0:3] 0
+########################################################################
+## Status Byte-2 (0xD) Read
+########################################################################
+vcosbr 0xD[3:7] 0 ## vco band readback
+adc 0xD[0:2] 0 ool0, lock0, vaslock0, vaslock1, vaslock2, vaslock3, lock1, ool1
+"""
+
+########################################################################
+# Template for methods in the body of the struct
+########################################################################
+BODY_TMPL="""\
+boost::uint8_t get_reg(boost::uint8_t addr){
+ boost::uint8_t reg = 0;
+ switch(addr){
+ #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs)))
+ case $addr:
+ #for $reg in filter(lambda r: r.get_addr() == addr, $regs)
+ reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift();
+ #end for
+ break;
+ #end for
+ }
+ return boost::uint8_t(reg);
+}
+
+void set_reg(boost::uint8_t addr, boost::uint8_t reg){
+ switch(addr){
+ #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs)))
+ case $addr:
+ #for $reg in filter(lambda r: r.get_addr() == addr, $regs)
+ $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask());
+ #end for
+ break;
+ #end for
+ }
+}
+"""
+
+SPLIT_REGS_HELPER_TMPL="""\
+#for $divname in ['n','f']
+void set_$(divname)_divider(boost::uint32_t $divname){
+ #for $regname in sorted(map(lambda r: r.get_name(), filter(lambda r: r.get_name().find(divname + '_divider') == 0, $regs)))
+ #end for
+}
+#end for
+"""
+ #$regname = boost::uint8_t($divname & $regs[regname].get_mask());
+ #$divname = boost::uint32_t($divname >> $regs[regname].get_shift());
+
+if __name__ == '__main__':
+ import common; common.generate(
+ name='max2112_write_regs',
+ regs_tmpl=WRITE_REGS_TMPL,
+ body_tmpl=BODY_TMPL,
+ file=__file__,
+ )
+
+ import common; common.generate(
+ name='max2112_read_regs',
+ regs_tmpl=READ_REGS_TMPL,
+ body_tmpl=BODY_TMPL,
+ file=__file__,
+ append=True,
+ )
diff --git a/host/lib/usrp/dboard/CMakeLists.txt b/host/lib/usrp/dboard/CMakeLists.txt
index 8d3d11530..79cd42d18 100644
--- a/host/lib/usrp/dboard/CMakeLists.txt
+++ b/host/lib/usrp/dboard/CMakeLists.txt
@@ -25,5 +25,6 @@ LIBUHD_APPEND_SOURCES(
${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_dbsrx.cpp
${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_unknown.cpp
${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_tvrx.cpp
+ ${CMAKE_SOURCE_DIR}/lib/usrp/dboard/db_dbsrx2.cpp
)
diff --git a/host/lib/usrp/dboard/db_dbsrx2.cpp b/host/lib/usrp/dboard/db_dbsrx2.cpp
new file mode 100644
index 000000000..8b069a3e8
--- /dev/null
+++ b/host/lib/usrp/dboard/db_dbsrx2.cpp
@@ -0,0 +1,454 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+// No RX IO Pins Used
+
+#include "max2112_regs.hpp"
+#include <uhd/utils/static.hpp>
+#include <uhd/utils/assert.hpp>
+#include <uhd/utils/algorithm.hpp>
+#include <uhd/types/ranges.hpp>
+#include <uhd/types/dict.hpp>
+#include <uhd/usrp/subdev_props.hpp>
+#include <uhd/usrp/dboard_base.hpp>
+#include <uhd/usrp/dboard_manager.hpp>
+#include <boost/assign/list_of.hpp>
+#include <boost/format.hpp>
+#include <boost/thread.hpp>
+#include <boost/math/special_functions/round.hpp>
+#include <utility>
+
+using namespace uhd;
+using namespace uhd::usrp;
+using namespace boost::assign;
+
+/***********************************************************************
+ * The DBSRX2 constants
+ **********************************************************************/
+static const bool dbsrx2_debug = false;
+
+static const freq_range_t dbsrx2_freq_range(0.8e9, 2.4e9);
+
+static const int dbsrx2_ref_divider = 4; // Hitachi HMC426 divider (U7)
+
+static const prop_names_t dbsrx2_antennas = list_of("J3");
+
+static const uhd::dict<std::string, gain_range_t> dbsrx2_gain_ranges = map_list_of
+ ("GC1", gain_range_t(0, 73, 0.05))
+ ("BBG", gain_range_t(0, 15, 1))
+;
+
+/***********************************************************************
+ * The DBSRX2 dboard class
+ **********************************************************************/
+class dbsrx2 : public rx_dboard_base{
+public:
+ dbsrx2(ctor_args_t args, boost::uint8_t max2112_addr);
+ ~dbsrx2(void);
+
+ void rx_get(const wax::obj &key, wax::obj &val);
+ void rx_set(const wax::obj &key, const wax::obj &val);
+
+private:
+ double _lo_freq;
+ float _bandwidth;
+ uhd::dict<std::string, float> _gains;
+ max2112_write_regs_t _max2112_write_regs;
+ max2112_read_regs_t _max2112_read_regs;
+ boost::uint8_t _max2112_addr; //0x60 or 0x61 depending on which side
+
+ void set_lo_freq(double target_freq);
+ void set_gain(float gain, const std::string &name);
+ void set_bandwidth(float bandwidth);
+
+ void send_reg(boost::uint8_t start_reg, boost::uint8_t stop_reg){
+ start_reg = boost::uint8_t(std::clip(int(start_reg), 0x0, 0xB));
+ stop_reg = boost::uint8_t(std::clip(int(stop_reg), 0x0, 0xB));
+
+ for(boost::uint8_t start_addr=start_reg; start_addr <= stop_reg; start_addr += sizeof(boost::uint32_t) - 1){
+ int num_bytes = int(stop_reg - start_addr + 1) > int(sizeof(boost::uint32_t)) - 1 ? sizeof(boost::uint32_t) - 1 : stop_reg - start_addr + 1;
+
+ //create buffer for register data (+1 for start address)
+ byte_vector_t regs_vector(num_bytes + 1);
+
+ //first byte is the address of first register
+ regs_vector[0] = start_addr;
+
+ //get the register data
+ for(int i=0; i<num_bytes; i++){
+ regs_vector[1+i] = _max2112_write_regs.get_reg(start_addr+i);
+ if(dbsrx2_debug) std::cerr << boost::format(
+ "DBSRX2: send reg 0x%02x, value 0x%04x, start_addr = 0x%04x, num_bytes %d"
+ ) % int(start_addr+i) % int(regs_vector[1+i]) % int(start_addr) % num_bytes << std::endl;
+ }
+
+ //send the data
+ this->get_iface()->write_i2c(
+ _max2112_addr, regs_vector
+ );
+ }
+ }
+
+ void read_reg(boost::uint8_t start_reg, boost::uint8_t stop_reg){
+ static const boost::uint8_t status_addr = 0xC;
+ start_reg = boost::uint8_t(std::clip(int(start_reg), 0x0, 0xD));
+ stop_reg = boost::uint8_t(std::clip(int(stop_reg), 0x0, 0xD));
+
+ for(boost::uint8_t start_addr=start_reg; start_addr <= stop_reg; start_addr += sizeof(boost::uint32_t)){
+ int num_bytes = int(stop_reg - start_addr + 1) > int(sizeof(boost::uint32_t)) ? sizeof(boost::uint32_t) : stop_reg - start_addr + 1;
+
+ //create address to start reading register data
+ byte_vector_t address_vector(1);
+ address_vector[0] = start_addr;
+
+ //send the address
+ this->get_iface()->write_i2c(
+ _max2112_addr, address_vector
+ );
+
+ //create buffer for register data
+ byte_vector_t regs_vector(num_bytes);
+
+ //read from i2c
+ regs_vector = this->get_iface()->read_i2c(
+ _max2112_addr, num_bytes
+ );
+
+ for(boost::uint8_t i=0; i < num_bytes; i++){
+ if (i + start_addr >= status_addr){
+ _max2112_read_regs.set_reg(i + start_addr, regs_vector[i]);
+ /*
+ if(dbsrx2_debug) std::cerr << boost::format(
+ "DBSRX2: set reg 0x%02x, value 0x%04x"
+ ) % int(i + start_addr) % int(_max2112_read_regs.get_reg(i + start_addr)) << std::endl;
+ */
+ }
+ if(dbsrx2_debug) std::cerr << boost::format(
+ "DBSRX2: read reg 0x%02x, value 0x%04x, start_addr = 0x%04x, num_bytes %d"
+ ) % int(start_addr+i) % int(regs_vector[i]) % int(start_addr) % num_bytes << std::endl;
+ }
+ }
+ }
+
+ /*!
+ * Is the LO locked?
+ * \return true for locked
+ */
+ bool get_locked(void){
+ read_reg(0xC, 0xD);
+
+ //mask and return lock detect
+ bool locked = _max2112_read_regs.ld & _max2112_read_regs.vasa & _max2112_read_regs.vase;
+
+ if(dbsrx2_debug) std::cerr << boost::format(
+ "DBSRX2 locked: %d"
+ ) % locked << std::endl;
+
+ return locked;
+ }
+
+};
+
+/***********************************************************************
+ * Register the DBSRX2 dboard
+ **********************************************************************/
+// FIXME 0x67 is the default i2c address on USRP2
+// need to handle which side for USRP1 with different address
+static dboard_base::sptr make_dbsrx2(dboard_base::ctor_args_t args){
+ return dboard_base::sptr(new dbsrx2(args, 0x61));
+}
+
+UHD_STATIC_BLOCK(reg_dbsrx2_dboard){
+ //register the factory function for the rx dbid
+ dboard_manager::register_dboard(0x0012, &make_dbsrx2, "DBSRX2");
+}
+
+/***********************************************************************
+ * Structors
+ **********************************************************************/
+dbsrx2::dbsrx2(ctor_args_t args, boost::uint8_t max2112_addr) : rx_dboard_base(args){
+ //enable only the clocks we need
+ this->get_iface()->set_clock_enabled(dboard_iface::UNIT_RX, true);
+
+ //set the gpio directions and atr controls (identically)
+ this->get_iface()->set_pin_ctrl(dboard_iface::UNIT_RX, 0x0); // All unused in atr
+ this->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, 0x0); // All Inputs
+
+ //set the i2c address for the max2112
+ _max2112_addr = max2112_addr;
+
+ //send initial register settings
+ send_reg(0x0, 0xB);
+ //for (boost::uint8_t addr=0; addr<=12; addr++) this->send_reg(addr, addr);
+
+ //set defaults for LO, gains
+ set_lo_freq(dbsrx2_freq_range.min);
+ BOOST_FOREACH(const std::string &name, dbsrx2_gain_ranges.keys()){
+ set_gain(dbsrx2_gain_ranges[name].min, name);
+ }
+
+ set_bandwidth(40e6); // default bandwidth from datasheet
+ get_locked();
+
+ _max2112_write_regs.bbg = int (std::clip<float>(boost::math::iround(0.0), dbsrx2_gain_ranges["BBG"].min, dbsrx2_gain_ranges["BBG"].max));
+ send_reg(0x9, 0x9);
+}
+
+dbsrx2::~dbsrx2(void){
+}
+
+
+/***********************************************************************
+ * Tuning
+ **********************************************************************/
+void dbsrx2::set_lo_freq(double target_freq){
+ //target_freq = std::clip(target_freq, dbsrx2_freq_range.min, dbsrx2_freq_range.max);
+
+ //variables used in the calculation below
+ int scaler = target_freq > 1125e6 ? 2 : 4;
+ double ref_freq = this->get_iface()->get_clock_rate(dboard_iface::UNIT_RX);
+ int R, intdiv, fracdiv, ext_div;
+ double N;
+
+ //compute tuning variables
+ ext_div = dbsrx2_ref_divider; // 12MHz < ref_freq/ext_divider < 30MHz
+
+ R = 1; //Divide by 1 is the only tested value
+
+ N = (target_freq*R*ext_div)/(ref_freq); //actual spec range is (19, 251)
+ intdiv = int(std::floor(N)); // if (intdiv < 19 or intdiv > 251) continue;
+ fracdiv = boost::math::iround((N - intdiv)*double(1 << 20));
+
+ //calculate the actual freq from the values above
+ N = double(intdiv) + double(fracdiv)/double(1 << 20);
+ _lo_freq = (N*ref_freq)/(R*ext_div);
+
+ //load new counters into registers
+ _max2112_write_regs.set_n_divider(intdiv);
+ _max2112_write_regs.set_f_divider(fracdiv);
+ _max2112_write_regs.r_divider = R;
+ _max2112_write_regs.d24 = scaler == 4 ? max2112_write_regs_t::D24_DIV4 : max2112_write_regs_t::D24_DIV2;
+
+ //debug output of calculated variables
+ if (dbsrx2_debug) std::cerr
+ << boost::format("DBSRX2 tune:\n")
+ << boost::format(" R=%d, N=%f, scaler=%d, ext_div=%d\n") % R % N % scaler % ext_div
+ << boost::format(" int=%d, frac=%d, d24=%d\n") % intdiv % fracdiv % int(_max2112_write_regs.d24)
+ << boost::format(" Ref Freq=%fMHz\n") % (ref_freq/1e6)
+ << boost::format(" Target Freq=%fMHz\n") % (target_freq/1e6)
+ << boost::format(" Actual Freq=%fMHz\n") % (_lo_freq/1e6)
+ << std::endl;
+
+ //send the registers
+ send_reg(0x0, 0x7);
+
+ //FIXME: probably unnecessary to call get_locked here
+ //get_locked();
+
+}
+
+/***********************************************************************
+ * Gain Handling
+ **********************************************************************/
+/*!
+ * Convert a requested gain for the BBG vga into the integer register value.
+ * The gain passed into the function will be set to the actual value.
+ * \param gain the requested gain in dB
+ * \return 4 bit the register value
+ */
+static int gain_to_bbg_vga_reg(float &gain){
+ int reg = std::clip<float>(boost::math::iround(gain), dbsrx2_gain_ranges["BBG"].min, dbsrx2_gain_ranges["BBG"].max);
+
+ gain = float(reg);
+
+ if (dbsrx2_debug) std::cerr
+ << boost::format("DBSRX2 BBG Gain:\n")
+ << boost::format(" %f dB, bbg: %d") % gain % reg
+ << std::endl;
+
+ return reg;
+}
+
+/*!
+ * Convert a requested gain for the GC1 rf vga into the dac_volts value.
+ * The gain passed into the function will be set to the actual value.
+ * \param gain the requested gain in dB
+ * \return dac voltage value
+ */
+static float gain_to_gc1_rfvga_dac(float &gain){
+ //clip the input
+ gain = std::clip<float>(gain, dbsrx2_gain_ranges["GC1"].min, dbsrx2_gain_ranges["GC1"].max);
+
+ //voltage level constants
+ static const float max_volts = float(0.5), min_volts = float(2.7);
+ static const float slope = (max_volts-min_volts)/dbsrx2_gain_ranges["GC1"].max;
+
+ //calculate the voltage for the aux dac
+ float dac_volts = gain*slope + min_volts;
+
+ if (dbsrx2_debug) std::cerr
+ << boost::format("DBSRX2 GC1 Gain:\n")
+ << boost::format(" %f dB, dac_volts: %f V") % gain % dac_volts
+ << std::endl;
+
+ //the actual gain setting
+ gain = (dac_volts - min_volts)/slope;
+
+ return dac_volts;
+}
+
+void dbsrx2::set_gain(float gain, const std::string &name){
+ assert_has(dbsrx2_gain_ranges.keys(), name, "dbsrx2 gain name");
+ if (name == "BBG"){
+ //_max2112_write_regs.bbg = gain_to_bbg_vga_reg(gain);
+ //send_reg(0x9, 0x9);
+ }
+ else if(name == "GC1"){
+ //write the new voltage to the aux dac
+ this->get_iface()->write_aux_dac(dboard_iface::UNIT_RX, dboard_iface::AUX_DAC_A, gain_to_gc1_rfvga_dac(gain));
+ }
+ else UHD_THROW_INVALID_CODE_PATH();
+ _gains[name] = gain;
+}
+
+/***********************************************************************
+ * Bandwidth Handling
+ **********************************************************************/
+void dbsrx2::set_bandwidth(float bandwidth){
+ //clip the input
+ bandwidth = std::clip<float>(bandwidth, 4e6, 40e6);
+
+ _max2112_write_regs.lp = int((bandwidth/1e6 - 4)/0.29 + 12);
+ _bandwidth = float(4 + (_max2112_write_regs.lp - 12) * 0.29)*1e6;
+
+ if (dbsrx2_debug) std::cerr
+ << boost::format("DBSRX2 Bandwidth:\n")
+ << boost::format(" %f MHz, lp: %f V") % (_bandwidth/1e6) % int(_max2112_write_regs.lp)
+ << std::endl;
+
+ this->send_reg(0x8, 0x8);
+}
+
+/***********************************************************************
+ * RX Get and Set
+ **********************************************************************/
+void dbsrx2::rx_get(const wax::obj &key_, wax::obj &val){
+ wax::obj key; std::string name;
+ boost::tie(key, name) = extract_named_prop(key_);
+
+ //handle the get request conditioned on the key
+ switch(key.as<subdev_prop_t>()){
+ case SUBDEV_PROP_NAME:
+ val = get_rx_id().to_pp_string();
+ return;
+
+ case SUBDEV_PROP_OTHERS:
+ val = prop_names_t(); //empty
+ return;
+
+ case SUBDEV_PROP_GAIN:
+ assert_has(_gains.keys(), name, "dbsrx2 gain name");
+ val = _gains[name];
+ return;
+
+ case SUBDEV_PROP_GAIN_RANGE:
+ assert_has(dbsrx2_gain_ranges.keys(), name, "dbsrx2 gain name");
+ val = dbsrx2_gain_ranges[name];
+ return;
+
+ case SUBDEV_PROP_GAIN_NAMES:
+ val = prop_names_t(dbsrx2_gain_ranges.keys());
+ return;
+
+ case SUBDEV_PROP_FREQ:
+ val = _lo_freq;
+ return;
+
+ case SUBDEV_PROP_FREQ_RANGE:
+ val = dbsrx2_freq_range;
+ return;
+
+ case SUBDEV_PROP_ANTENNA:
+ val = std::string("J3");
+ return;
+
+ case SUBDEV_PROP_ANTENNA_NAMES:
+ val = dbsrx2_antennas;
+ return;
+
+/*
+ case SUBDEV_PROP_QUADRATURE:
+ val = true;
+ return;
+
+ case SUBDEV_PROP_IQ_SWAPPED:
+ val = true;
+ return;
+
+ case SUBDEV_PROP_SPECTRUM_INVERTED:
+ val = false;
+ return;
+*/
+ case SUBDEV_PROP_CONNECTION:
+ val = SUBDEV_CONN_COMPLEX_QI;
+ return;
+
+ case SUBDEV_PROP_USE_LO_OFFSET:
+ val = false;
+ return;
+
+ case SUBDEV_PROP_LO_LOCKED:
+ val = this->get_locked();
+ return;
+
+/*
+ case SUBDEV_PROP_RSSI:
+ val = this->get_rssi();
+ return;
+*/
+
+ case SUBDEV_PROP_BANDWIDTH:
+ val = _bandwidth;
+ return;
+
+ default: UHD_THROW_PROP_GET_ERROR();
+ }
+}
+
+void dbsrx2::rx_set(const wax::obj &key_, const wax::obj &val){
+ wax::obj key; std::string name;
+ boost::tie(key, name) = extract_named_prop(key_);
+
+ //handle the get request conditioned on the key
+ switch(key.as<subdev_prop_t>()){
+
+ case SUBDEV_PROP_FREQ:
+ this->set_lo_freq(val.as<double>());
+ return;
+
+ case SUBDEV_PROP_GAIN:
+ this->set_gain(val.as<float>(), name);
+ return;
+
+ case SUBDEV_PROP_BANDWIDTH:
+ this->set_bandwidth(val.as<float>());
+ return;
+
+ default: UHD_THROW_PROP_SET_ERROR();
+ }
+}
+