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| author | Balint Seeber <balint@ettus.com> | 2013-11-19 13:17:25 -0800 |
|---|---|---|
| committer | Balint Seeber <balint@ettus.com> | 2013-11-19 13:17:25 -0800 |
| commit | 01cfe2118f0bd72719809d2539c61df46a164fec (patch) | |
| tree | a93b693341d0e7b9c37844fabcd996ed626ba543 /host/lib/version.cpp | |
| parent | db6541583a9c42df79600b47ab2184ee59c46e6a (diff) | |
| download | uhd-01cfe2118f0bd72719809d2539c61df46a164fec.tar.gz uhd-01cfe2118f0bd72719809d2539c61df46a164fec.tar.bz2 uhd-01cfe2118f0bd72719809d2539c61df46a164fec.zip | |
b200: increase FPGA VREQ transfer size to 512 if operating over USB3
Diffstat (limited to 'host/lib/version.cpp')
0 files changed, 0 insertions, 0 deletions