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authormichael-west <michael.west@ettus.com>2014-07-10 14:37:38 -0700
committermichael-west <michael.west@ettus.com>2014-07-10 14:37:38 -0700
commit487e7fc2b41deb3867d24d8e4dacb10d2cafebb1 (patch)
tree36499f696a3d85b1fef613493a50b1255902136e /host/lib/usrp
parent016430b3f8b3535b59e70592fc1029f783cf6cd0 (diff)
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BUG #516: B210: Fails to Run with 30.72 MHz Clock
- Addressed feedback from review.
Diffstat (limited to 'host/lib/usrp')
-rw-r--r--host/lib/usrp/b200/b200_impl.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 72dd25904..d8c8db9ae 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -681,7 +681,7 @@ void b200_impl::enforce_tick_rate_limits(size_t chan_count, double tick_rate, co
else
{
const double max_tick_rate = ((chan_count <= 1) ? AD9361_1_CHAN_CLOCK_RATE_MAX : AD9361_2_CHAN_CLOCK_RATE_MAX);
- if (tick_rate > max_tick_rate and (tick_rate - max_tick_rate > 1.0))
+ if (tick_rate - max_tick_rate >= 1.0)
{
throw uhd::value_error(boost::str(
boost::format("current master clock rate (%.6f MHz) exceeds maximum possible master clock rate (%.6f MHz) when using %d %s channels")