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author | Josh Blum <josh@joshknows.com> | 2010-07-04 19:13:59 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-07-05 13:49:03 -0700 |
commit | 5e14653f241070791d46893e68e341357e040add (patch) | |
tree | 1b4e8da3e0fa3f2a53dd309d9f9ffddfd5c6f953 /host/lib/usrp | |
parent | 11f2aa1ea0fd6c28a20c6d85f94e41a06b3a6770 (diff) | |
download | uhd-5e14653f241070791d46893e68e341357e040add.tar.gz uhd-5e14653f241070791d46893e68e341357e040add.tar.bz2 uhd-5e14653f241070791d46893e68e341357e040add.zip |
usrp2: bug fix for readback registers
added readback for time64
fixed bug for fragment flag in vrt packet handler
Diffstat (limited to 'host/lib/usrp')
-rw-r--r-- | host/lib/usrp/usrp2/fw_common.h | 2 | ||||
-rw-r--r-- | host/lib/usrp/usrp2/mboard_impl.cpp | 10 | ||||
-rw-r--r-- | host/lib/usrp/usrp2/usrp2_regs.hpp | 10 |
3 files changed, 17 insertions, 5 deletions
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h index 242d268ec..12daa6286 100644 --- a/host/lib/usrp/usrp2/fw_common.h +++ b/host/lib/usrp/usrp2/fw_common.h @@ -38,7 +38,7 @@ extern "C" { //defines the protocol version in this shared header //increment this value when the protocol is changed -#define USRP2_PROTO_VERSION 4 +#define USRP2_PROTO_VERSION 5 //used to differentiate control packets over data port #define USRP2_INVALID_VRT_HEADER 0 diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index 28a346be7..36ac6275f 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -25,6 +25,7 @@ #include <boost/bind.hpp> #include <boost/asio/ip/address_v4.hpp> #include <boost/assign/list_of.hpp> +#include <iostream> using namespace uhd; using namespace uhd::usrp; @@ -72,6 +73,7 @@ usrp2_mboard_impl::usrp2_mboard_impl( ); _iface->poke32(U2_REG_RX_CTRL_VRT_STREAM_ID, 0); _iface->poke32(U2_REG_RX_CTRL_VRT_TRAILER, 0); + _iface->poke32(U2_REG_TIME64_TPS, size_t(get_master_clock_freq())); //init the ddc init_ddc_config(); @@ -254,6 +256,14 @@ void usrp2_mboard_impl::get(const wax::obj &key_, wax::obj &val){ val = _clock_config; return; + case MBOARD_PROP_TIME_NOW: + val = time_spec_t( + _iface->peek32(U2_REG_TIME64_SECS_RB), + _iface->peek32(U2_REG_TIME64_TICKS_RB), + get_master_clock_freq() + ); + return; + default: UHD_THROW_PROP_GET_ERROR(); } } diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp index 589fa71a3..c859d3603 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -18,8 +18,6 @@ #ifndef INCLUDED_USRP2_REGS_HPP #define INCLUDED_USRP2_REGS_HPP -#include <boost/cstdint.hpp> - //////////////////////////////////////////////////// // Settings Bus, Slave #7, Not Byte Addressable! // @@ -46,7 +44,7 @@ #define SR_SIMTIMER 198 #define SR_LAST 255 -#define _SR_ADDR(sr) (MISC_OUTPUT_BASE + (sr) * sizeof(boost::uint32_t)) +#define _SR_ADDR(sr) ((MISC_OUTPUT_BASE) + (4*(sr))) ///////////////////////////////////////////////// // SPI Slave Constants @@ -104,7 +102,11 @@ #define U2_REG_TIME64_SECS _SR_ADDR(SR_TIME64 + 0) // value to set absolute secs to on next PPS #define U2_REG_TIME64_TICKS _SR_ADDR(SR_TIME64 + 1) // value to set absolute ticks to on next PPS #define U2_REG_TIME64_FLAGS _SR_ADDR(SR_TIME64 + 2) // flags - see chart above -#define U2_REG_TIME64_IMM _SR_ADDR(SR_TIME64 + 3) // set immediate (0=latch on next pps, 1=latch immediate, default=0) +#define U2_REG_TIME64_IMM _SR_ADDR(SR_TIME64 + 3) // set immediate (0=latch on next pps, 1=latch immediate, default=0) +#define U2_REG_TIME64_TPS _SR_ADDR(SR_TIME64 + 4) // the ticks per second rollover count + +#define U2_REG_TIME64_SECS_RB (0xCC00 + 4*10) +#define U2_REG_TIME64_TICKS_RB (0xCC00 + 4*11) //pps flags (see above) #define U2_FLAG_TIME64_PPS_NEGEDGE (0 << 0) |