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author | Josh Blum <josh@joshknows.com> | 2011-06-27 16:07:13 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-06-27 16:07:13 -0700 |
commit | 9b4c8c7c9c9e9645b0ee27a6d6ad06bbfbf1ae66 (patch) | |
tree | 2786f51224a2b7f20a495ec6da92de56cf078c30 /host/lib/usrp | |
parent | d9630428843f2510d99cb494435e4dc273652250 (diff) | |
download | uhd-9b4c8c7c9c9e9645b0ee27a6d6ad06bbfbf1ae66.tar.gz uhd-9b4c8c7c9c9e9645b0ee27a6d6ad06bbfbf1ae66.tar.bz2 uhd-9b4c8c7c9c9e9645b0ee27a6d6ad06bbfbf1ae66.zip |
usrp2: setup many more control objects and xports
Diffstat (limited to 'host/lib/usrp')
-rw-r--r-- | host/lib/usrp/cores/rx_dsp_core_200.cpp | 11 | ||||
-rw-r--r-- | host/lib/usrp/cores/rx_dsp_core_200.hpp | 4 | ||||
-rw-r--r-- | host/lib/usrp/cores/tx_dsp_core_200.cpp | 5 | ||||
-rw-r--r-- | host/lib/usrp/cores/tx_dsp_core_200.hpp | 2 |
4 files changed, 17 insertions, 5 deletions
diff --git a/host/lib/usrp/cores/rx_dsp_core_200.cpp b/host/lib/usrp/cores/rx_dsp_core_200.cpp index e4d88b38f..5aa32c630 100644 --- a/host/lib/usrp/cores/rx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/rx_dsp_core_200.cpp @@ -48,12 +48,11 @@ public: rx_dsp_core_200_impl( wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, - const boost::uint32_t sid, const size_t nsamps + const boost::uint32_t sid ): _iface(iface), _dsp_base(dsp_base), _ctrl_base(ctrl_base) { _iface->poke32(REG_RX_CTRL_CLEAR, 1); //reset - _iface->poke32(REG_RX_CTRL_NSAMPS_PP, nsamps); _iface->poke32(REG_RX_CTRL_NCHANNELS, 1); _iface->poke32(REG_RX_CTRL_VRT_HDR, 0 | (0x1 << 28) //if data with stream id @@ -65,6 +64,10 @@ public: _iface->poke32(REG_RX_CTRL_VRT_TLR, 0); } + void set_nsamps_per_packet(const size_t nsamps){ + _iface->poke32(REG_RX_CTRL_NSAMPS_PP, nsamps); + } + void issue_stream_command(const stream_cmd_t &stream_cmd){ UHD_ASSERT_THROW(stream_cmd.num_samps <= 0x3fffffff); _continuous_streaming = stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS; @@ -159,6 +162,6 @@ private: bool _continuous_streaming; }; -rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid, const size_t nsamps){ - return sptr(new rx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid, nsamps)); +rx_dsp_core_200::sptr rx_dsp_core_200::make(wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, const boost::uint32_t sid){ + return sptr(new rx_dsp_core_200_impl(iface, dsp_base, ctrl_base, sid)); } diff --git a/host/lib/usrp/cores/rx_dsp_core_200.hpp b/host/lib/usrp/cores/rx_dsp_core_200.hpp index a88c39a2f..6bc7c6102 100644 --- a/host/lib/usrp/cores/rx_dsp_core_200.hpp +++ b/host/lib/usrp/cores/rx_dsp_core_200.hpp @@ -32,9 +32,11 @@ public: static sptr make( wb_iface::sptr iface, const size_t dsp_base, const size_t ctrl_base, - const boost::uint32_t sid, const size_t nsamps + const boost::uint32_t sid ); + virtual void set_nsamps_per_packet(const size_t nsamps) = 0; + virtual void issue_stream_command(const uhd::stream_cmd_t &stream_cmd) = 0; virtual void set_mux(const std::string &mode) = 0; diff --git a/host/lib/usrp/cores/tx_dsp_core_200.cpp b/host/lib/usrp/cores/tx_dsp_core_200.cpp index c7e18a8a6..6ad88c380 100644 --- a/host/lib/usrp/cores/tx_dsp_core_200.cpp +++ b/host/lib/usrp/cores/tx_dsp_core_200.cpp @@ -112,6 +112,11 @@ public: return actual_freq; } + void set_updates(const size_t cycles_per_up, const size_t packets_per_up){ + _iface->poke32(REG_TX_CTRL_CYCLES_PER_UP, (cycles_per_up == 0)? 0 : (FLAG_TX_CTRL_UP_ENB | cycles_per_up)); + _iface->poke32(REG_TX_CTRL_PACKETS_PER_UP, (packets_per_up == 0)? 0 : (FLAG_TX_CTRL_UP_ENB | packets_per_up)); + } + private: wb_iface::sptr _iface; const size_t _dsp_base, _ctrl_base; diff --git a/host/lib/usrp/cores/tx_dsp_core_200.hpp b/host/lib/usrp/cores/tx_dsp_core_200.hpp index 479023caa..f218fe8c9 100644 --- a/host/lib/usrp/cores/tx_dsp_core_200.hpp +++ b/host/lib/usrp/cores/tx_dsp_core_200.hpp @@ -39,6 +39,8 @@ public: virtual double set_freq(const double freq) = 0; + virtual void set_updates(const size_t cycles_per_up, const size_t packets_per_up) = 0; + }; #endif /* INCLUDED_LIBUHD_USRP_TX_DSP_CORE_200_HPP */ |