Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into flow_ctrl

Conflicts:
	host/lib/transport/udp_simple.cpp
	host/lib/usrp/usrp2/mboard_impl.cpp
	host/lib/usrp/usrp2/usrp2_iface.cpp
	host/lib/usrp/usrp2/usrp2_regs.hpp

35 files changed, 1304 insertions, 334 deletions

diff --git a/host/lib/usrp/README b/host/lib/usrp/README
new file mode 100644
index 000000000..c125d1dad
--- /dev/null
+++ b/host/lib/usrp/README
@@ -0,0 +1,12 @@
+########################################################################
+# lib USRP directories:
+########################################################################
+
+dboard:
+    Daughterboard implementation code for all USRP daughterboards
+
+usrp1:
+    Implementation code for the USB-based USRP Classic motherboard.
+
+usrp2:
+    Implementation code for USRP2 and USRP-N2XX.
diff --git a/host/lib/usrp/dboard/db_dbsrx.cpp b/host/lib/usrp/dboard/db_dbsrx.cpp
index aa3eeb6b5..7edc1822c 100644
--- a/host/lib/usrp/dboard/db_dbsrx.cpp
+++ b/host/lib/usrp/dboard/db_dbsrx.cpp
@@ -212,10 +212,10 @@ dbsrx::dbsrx(ctor_args_t args) : rx_dboard_base(args){
 
     //set defaults for LO, gains, and filter bandwidth
     _bandwidth = 33e6;
-    set_lo_freq(dbsrx_freq_range.min);
+    set_lo_freq(dbsrx_freq_range.start());
 
     BOOST_FOREACH(const std::string &name, dbsrx_gain_ranges.keys()){
-        set_gain(dbsrx_gain_ranges[name].min, name);
+        set_gain(dbsrx_gain_ranges[name].start(), name);
     }
 
     set_bandwidth(33e6); // default bandwidth from datasheet
@@ -229,7 +229,7 @@ dbsrx::~dbsrx(void){
  * Tuning
  **********************************************************************/
 void dbsrx::set_lo_freq(double target_freq){
-    target_freq = std::clip(target_freq, dbsrx_freq_range.min, dbsrx_freq_range.max);
+    target_freq = dbsrx_freq_range.clip(target_freq);
 
     double actual_freq=0.0, pfd_freq=0.0, ref_clock=0.0;
     int R=0, N=0, r=0, m=0;
@@ -261,7 +261,7 @@ void dbsrx::set_lo_freq(double target_freq){
             pfd_freq = ref_clock / R;
 
             //constrain the PFD frequency to specified range
-            if ((pfd_freq < dbsrx_pfd_freq_range.min) or (pfd_freq > dbsrx_pfd_freq_range.max)) continue;
+            if ((pfd_freq < dbsrx_pfd_freq_range.start()) or (pfd_freq > dbsrx_pfd_freq_range.stop())) continue;
 
             //compute N
             N = int(std::floor(target_freq/pfd_freq));
@@ -278,7 +278,7 @@ void dbsrx::set_lo_freq(double target_freq){
     //Assert because we failed to find a suitable combination of ref_clock, R and N 
     UHD_ASSERT_THROW(ref_clock <= 27.0e6 and ref_clock >= 0.0);
     UHD_ASSERT_THROW(ref_clock/m >= 1e6 and ref_clock/m <= 2.5e6);
-    UHD_ASSERT_THROW((pfd_freq >= dbsrx_pfd_freq_range.min) and (pfd_freq <= dbsrx_pfd_freq_range.max));
+    UHD_ASSERT_THROW((pfd_freq >= dbsrx_pfd_freq_range.start()) and (pfd_freq <= dbsrx_pfd_freq_range.stop()));
     UHD_ASSERT_THROW((N >= 256) and (N <= 32768));
 
     if(dbsrx_debug) std::cerr << boost::format(
@@ -420,7 +420,7 @@ void dbsrx::set_lo_freq(double target_freq){
  */
 static int gain_to_gc2_vga_reg(float &gain){
     int reg = 0;
-    gain = std::clip<float>(float(boost::math::iround(gain)), dbsrx_gain_ranges["GC2"].min, dbsrx_gain_ranges["GC2"].max);
+    gain = dbsrx_gain_ranges["GC2"].clip(gain);
 
     // Half dB steps from 0-5dB, 1dB steps from 5-24dB
     if (gain < 5) {
@@ -446,11 +446,11 @@ static int gain_to_gc2_vga_reg(float &gain){
  */
 static float gain_to_gc1_rfvga_dac(float &gain){
     //clip the input
-    gain = std::clip<float>(gain, dbsrx_gain_ranges["GC1"].min, dbsrx_gain_ranges["GC1"].max);
+    gain = dbsrx_gain_ranges["GC1"].clip(gain);
 
     //voltage level constants
     static const float max_volts = float(1.2), min_volts = float(2.7);
-    static const float slope = (max_volts-min_volts)/dbsrx_gain_ranges["GC1"].max;
+    static const float slope = (max_volts-min_volts)/dbsrx_gain_ranges["GC1"].stop();
 
     //calculate the voltage for the aux dac
     float dac_volts = gain*slope + min_volts;
diff --git a/host/lib/usrp/dboard/db_dbsrx2.cpp b/host/lib/usrp/dboard/db_dbsrx2.cpp
index 5a65e6123..cdafd6a78 100644
--- a/host/lib/usrp/dboard/db_dbsrx2.cpp
+++ b/host/lib/usrp/dboard/db_dbsrx2.cpp
@@ -195,15 +195,15 @@ dbsrx2::dbsrx2(ctor_args_t args) : rx_dboard_base(args){
     //for (boost::uint8_t addr=0; addr<=12; addr++) this->send_reg(addr, addr);
 
     //set defaults for LO, gains
-    set_lo_freq(dbsrx2_freq_range.min);
+    set_lo_freq(dbsrx2_freq_range.start());
     BOOST_FOREACH(const std::string &name, dbsrx2_gain_ranges.keys()){
-        set_gain(dbsrx2_gain_ranges[name].min, name);
+        set_gain(dbsrx2_gain_ranges[name].start(), name);
     }
 
     set_bandwidth(40e6); // default bandwidth from datasheet
     get_locked();
 
-    _max2112_write_regs.bbg = boost::math::iround(std::clip<float>(0, dbsrx2_gain_ranges["BBG"].min, dbsrx2_gain_ranges["BBG"].max));
+    _max2112_write_regs.bbg = boost::math::iround(dbsrx2_gain_ranges["BBG"].start());
     send_reg(0x9, 0x9);
 }
 
@@ -270,7 +270,7 @@ void dbsrx2::set_lo_freq(double target_freq){
  * \return 4 bit the register value
  */
 static int gain_to_bbg_vga_reg(float &gain){
-    int reg = boost::math::iround(std::clip<float>(gain, dbsrx2_gain_ranges["BBG"].min, dbsrx2_gain_ranges["BBG"].max));
+    int reg = boost::math::iround(dbsrx2_gain_ranges["BBG"].clip(gain));
 
     gain = float(reg);
 
@@ -290,11 +290,11 @@ static int gain_to_bbg_vga_reg(float &gain){
  */
 static float gain_to_gc1_rfvga_dac(float &gain){
     //clip the input
-    gain = std::clip<float>(gain, dbsrx2_gain_ranges["GC1"].min, dbsrx2_gain_ranges["GC1"].max);
+    gain = dbsrx2_gain_ranges["GC1"].clip(gain);
 
     //voltage level constants
     static const float max_volts = float(0.5), min_volts = float(2.7);
-    static const float slope = (max_volts-min_volts)/dbsrx2_gain_ranges["GC1"].max;
+    static const float slope = (max_volts-min_volts)/dbsrx2_gain_ranges["GC1"].stop();
 
     //calculate the voltage for the aux dac
     float dac_volts = gain*slope + min_volts;
diff --git a/host/lib/usrp/dboard/db_rfx.cpp b/host/lib/usrp/dboard/db_rfx.cpp
index 152198c3a..74a9fb37b 100644
--- a/host/lib/usrp/dboard/db_rfx.cpp
+++ b/host/lib/usrp/dboard/db_rfx.cpp
@@ -93,9 +93,9 @@ public:
     void tx_set(const wax::obj &key, const wax::obj &val);
 
 private:
-    freq_range_t _freq_range;
-    uhd::dict<std::string, gain_range_t> _rx_gain_ranges;
-    uhd::dict<dboard_iface::unit_t, bool> _div2;
+    const freq_range_t _freq_range;
+    const uhd::dict<std::string, gain_range_t> _rx_gain_ranges;
+    const uhd::dict<dboard_iface::unit_t, bool> _div2;
     double       _rx_lo_freq, _tx_lo_freq;
     std::string  _rx_ant;
     uhd::dict<std::string, float> _rx_gains;
@@ -168,19 +168,17 @@ rfx_xcvr::rfx_xcvr(
     ctor_args_t args,
     const freq_range_t &freq_range,
     bool rx_div2, bool tx_div2
-) : xcvr_dboard_base(args){
-    _freq_range = freq_range;
-    _div2[dboard_iface::UNIT_RX] = rx_div2;
-    _div2[dboard_iface::UNIT_TX] = tx_div2;
-
-    if(this->get_rx_id() == 0x0024) { //RFX400
-        _rx_gain_ranges = rfx400_rx_gain_ranges;
-    }
-    else {
-        _rx_gain_ranges = rfx_rx_gain_ranges;
-    }
-
-
+):
+    xcvr_dboard_base(args),
+    _freq_range(freq_range),
+    _rx_gain_ranges((get_rx_id() == 0x0024)?
+        rfx400_rx_gain_ranges : rfx_rx_gain_ranges
+    ),
+    _div2(map_list_of
+        (dboard_iface::UNIT_RX, rx_div2)
+        (dboard_iface::UNIT_TX, tx_div2)
+    )
+{
     //enable the clocks that we need
     this->get_iface()->set_clock_enabled(dboard_iface::UNIT_TX, true);
     this->get_iface()->set_clock_enabled(dboard_iface::UNIT_RX, true);
@@ -204,12 +202,12 @@ rfx_xcvr::rfx_xcvr(
     this->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, POWER_UP | ANT_RX2| MIXER_ENB);
 
     //set some default values
-    set_rx_lo_freq((_freq_range.min + _freq_range.max)/2.0);
-    set_tx_lo_freq((_freq_range.min + _freq_range.max)/2.0);
+    set_rx_lo_freq((_freq_range.start() + _freq_range.stop())/2.0);
+    set_tx_lo_freq((_freq_range.start() + _freq_range.stop())/2.0);
     set_rx_ant("RX2");
 
     BOOST_FOREACH(const std::string &name, _rx_gain_ranges.keys()){
-        set_rx_gain(_rx_gain_ranges[name].min, name);
+        set_rx_gain(_rx_gain_ranges[name].start(), name);
     }
 }
 
@@ -265,7 +263,7 @@ void rfx_xcvr::set_rx_gain(float gain, const std::string &name){
     assert_has(_rx_gain_ranges.keys(), name, "rfx rx gain name");
     if(name == "PGA0"){
         float dac_volts = rx_pga0_gain_to_dac_volts(gain, 
-                              (_rx_gain_ranges["PGA0"].max - _rx_gain_ranges["PGA0"].min));
+                              (_rx_gain_ranges["PGA0"].stop() - _rx_gain_ranges["PGA0"].start()));
         _rx_gains[name] = gain;
 
         //write the new voltage to the aux dac
@@ -294,7 +292,7 @@ double rfx_xcvr::set_lo_freq(
     ) % (target_freq/1e6) << std::endl;
 
     //clip the input
-    target_freq = std::clip(target_freq, _freq_range.min, _freq_range.max);
+    target_freq = _freq_range.clip(target_freq);
     if (_div2[unit]) target_freq *= 2;
 
     //map prescalers to the register enums
diff --git a/host/lib/usrp/dboard/db_tvrx.cpp b/host/lib/usrp/dboard/db_tvrx.cpp
index 2873e3d54..17fdad74a 100644
--- a/host/lib/usrp/dboard/db_tvrx.cpp
+++ b/host/lib/usrp/dboard/db_tvrx.cpp
@@ -200,12 +200,12 @@ tvrx::tvrx(ctor_args_t args) : rx_dboard_base(args){
     //send initial register settings if necessary
 
     //set default freq
-    _lo_freq = tvrx_freq_range.min + tvrx_if_freq; //init _lo_freq to a sane default
-    set_freq(tvrx_freq_range.min);
+    _lo_freq = tvrx_freq_range.start() + tvrx_if_freq; //init _lo_freq to a sane default
+    set_freq(tvrx_freq_range.start());
 
     //set default gains
     BOOST_FOREACH(const std::string &name, get_tvrx_gain_ranges().keys()){
-        set_gain(get_tvrx_gain_ranges()[name].min, name);
+        set_gain(get_tvrx_gain_ranges()[name].start(), name);
     }
 }
 
@@ -219,7 +219,7 @@ tvrx::~tvrx(void){
 
 static std::string get_band(double freq) {
     BOOST_FOREACH(const std::string &band, tvrx_freq_ranges.keys()) {
-        if(freq >= tvrx_freq_ranges[band].min && freq <= tvrx_freq_ranges[band].max){
+        if(freq >= tvrx_freq_ranges[band].start() && freq <= tvrx_freq_ranges[band].stop()){
             if(tvrx_debug) std::cout << "Band: " << band << std::endl;
             return band;
         }
@@ -277,7 +277,7 @@ static double gain_interp(double gain, boost::array<double, 17> db_vector, boost
 
 static float rf_gain_to_voltage(float gain, double lo_freq){
     //clip the input
-    gain = std::clip<float>(gain, get_tvrx_gain_ranges()["RF"].min, get_tvrx_gain_ranges()["RF"].max);
+    gain = get_tvrx_gain_ranges()["RF"].clip(gain);
 
     //first we need to find out what band we're in, because gains are different across different bands
     std::string band = get_band(lo_freq + tvrx_if_freq);
@@ -305,7 +305,7 @@ static float rf_gain_to_voltage(float gain, double lo_freq){
 
 static float if_gain_to_voltage(float gain){
     //clip the input
-    gain = std::clip<float>(gain, get_tvrx_gain_ranges()["IF"].min, get_tvrx_gain_ranges()["IF"].max);
+    gain = get_tvrx_gain_ranges()["IF"].clip(gain);
 
     double gain_volts = gain_interp(gain, tvrx_if_gains_db, tvrx_gains_volts);
     double dac_volts = gain_volts / opamp_gain;
@@ -337,7 +337,7 @@ void tvrx::set_gain(float gain, const std::string &name){
  */
 
 void tvrx::set_freq(double freq) {
-    freq = std::clip<double>(freq, tvrx_freq_range.min, tvrx_freq_range.max);
+    freq = tvrx_freq_range.clip(freq);
     std::string prev_band = get_band(_lo_freq - tvrx_if_freq);
     std::string new_band = get_band(freq);
 
diff --git a/host/lib/usrp/dboard/db_unknown.cpp b/host/lib/usrp/dboard/db_unknown.cpp
index a342471c4..168e1971c 100644
--- a/host/lib/usrp/dboard/db_unknown.cpp
+++ b/host/lib/usrp/dboard/db_unknown.cpp
@@ -24,19 +24,47 @@
 #include <uhd/usrp/dboard_manager.hpp>
 #include <boost/assign/list_of.hpp>
 #include <boost/format.hpp>
+#include <boost/foreach.hpp>
+#include <boost/tuple/tuple.hpp>
+#include <vector>
 
 using namespace uhd;
 using namespace uhd::usrp;
 using namespace boost::assign;
 
 /***********************************************************************
+ * Utility functions
+ **********************************************************************/
+static void warn_if_old_rfx(const dboard_id_t &dboard_id, const std::string &xx){
+    typedef boost::tuple<std::string, dboard_id_t, dboard_id_t> old_ids_t; //name, rx_id, tx_id
+    static const std::vector<old_ids_t> old_rfx_ids = list_of
+        (old_ids_t("Flex 400 Classic",  0x0004, 0x0008))
+        (old_ids_t("Flex 900 Classic",  0x0005, 0x0009))
+        (old_ids_t("Flex 1200 Classic", 0x0006, 0x000a))
+        (old_ids_t("Flex 1800 Classic", 0x0030, 0x0031))
+        (old_ids_t("Flex 2400 Classic", 0x0007, 0x000b))
+    ;
+    BOOST_FOREACH(const old_ids_t &old_id, old_rfx_ids){
+        std::string name; dboard_id_t rx_id, tx_id;
+        boost::tie(name, rx_id, tx_id) = old_id;
+        if (
+            (xx == "RX" and rx_id == dboard_id) or
+            (xx == "TX" and tx_id == dboard_id)
+        ) uhd::warning::post(str(boost::format(
+            "Detected %s daughterboard %s\n"
+            "This board requires modification to use.\n"
+            "See the daughterboard application notes.\n"
+        ) % xx % name));
+    }
+}
+
+/***********************************************************************
  * The unknown boards:
  *   Like a basic board, but with only one subdev.
  **********************************************************************/
 class unknown_rx : public rx_dboard_base{
 public:
     unknown_rx(ctor_args_t args);
-    ~unknown_rx(void);
 
     void rx_get(const wax::obj &key, wax::obj &val);
     void rx_set(const wax::obj &key, const wax::obj &val);
@@ -45,7 +73,6 @@ public:
 class unknown_tx : public tx_dboard_base{
 public:
     unknown_tx(ctor_args_t args);
-    ~unknown_tx(void);
 
     void tx_get(const wax::obj &key, wax::obj &val);
     void tx_set(const wax::obj &key, const wax::obj &val);
@@ -71,11 +98,7 @@ UHD_STATIC_BLOCK(reg_unknown_dboards){
  * Unknown RX dboard
  **********************************************************************/
 unknown_rx::unknown_rx(ctor_args_t args) : rx_dboard_base(args){
-    /* NOP */
-}
-
-unknown_rx::~unknown_rx(void){
-    /* NOP */
+    warn_if_old_rfx(this->get_rx_id(), "RX");
 }
 
 void unknown_rx::rx_get(const wax::obj &key_, wax::obj &val){
@@ -108,7 +131,7 @@ void unknown_rx::rx_get(const wax::obj &key_, wax::obj &val){
         return;
 
     case SUBDEV_PROP_FREQ_RANGE:
-        val = freq_range_t(0, 0);
+        val = freq_range_t(0.0, 0.0);
         return;
 
     case SUBDEV_PROP_ANTENNA:
@@ -177,11 +200,7 @@ void unknown_rx::rx_set(const wax::obj &key_, const wax::obj &val){
  * Unknown TX dboard
  **********************************************************************/
 unknown_tx::unknown_tx(ctor_args_t args) : tx_dboard_base(args){
-    /* NOP */
-}
-
-unknown_tx::~unknown_tx(void){
-    /* NOP */
+    warn_if_old_rfx(this->get_tx_id(), "TX");
 }
 
 void unknown_tx::tx_get(const wax::obj &key_, wax::obj &val){
@@ -214,7 +233,7 @@ void unknown_tx::tx_get(const wax::obj &key_, wax::obj &val){
         return;
 
     case SUBDEV_PROP_FREQ_RANGE:
-        val = freq_range_t(0, 0);
+        val = freq_range_t(0.0, 0.0);
         return;
 
     case SUBDEV_PROP_ANTENNA:
diff --git a/host/lib/usrp/dboard/db_wbx.cpp b/host/lib/usrp/dboard/db_wbx.cpp
index 572f5de97..dd5bd600b 100644
--- a/host/lib/usrp/dboard/db_wbx.cpp
+++ b/host/lib/usrp/dboard/db_wbx.cpp
@@ -177,15 +177,15 @@ wbx_xcvr::wbx_xcvr(ctor_args_t args) : xcvr_dboard_base(args){
     ) % RXIO_MASK % TXIO_MASK << std::endl;
 
     //set some default values
-    set_rx_lo_freq((wbx_freq_range.min + wbx_freq_range.max)/2.0);
-    set_tx_lo_freq((wbx_freq_range.min + wbx_freq_range.max)/2.0);
+    set_rx_lo_freq((wbx_freq_range.start() + wbx_freq_range.stop())/2.0);
+    set_tx_lo_freq((wbx_freq_range.start() + wbx_freq_range.stop())/2.0);
     set_rx_ant("RX2");
 
     BOOST_FOREACH(const std::string &name, wbx_tx_gain_ranges.keys()){
-        set_tx_gain(wbx_tx_gain_ranges[name].min, name);
+        set_tx_gain(wbx_tx_gain_ranges[name].start(), name);
     }
     BOOST_FOREACH(const std::string &name, wbx_rx_gain_ranges.keys()){
-        set_rx_gain(wbx_rx_gain_ranges[name].min, name);
+        set_rx_gain(wbx_rx_gain_ranges[name].start(), name);
     }
 }
 
@@ -198,33 +198,32 @@ wbx_xcvr::~wbx_xcvr(void){
  **********************************************************************/
 static int rx_pga0_gain_to_iobits(float &gain){
     //clip the input
-    gain = std::clip<float>(gain, wbx_rx_gain_ranges["PGA0"].min, wbx_rx_gain_ranges["PGA0"].max);
+    gain = wbx_rx_gain_ranges["PGA0"].clip(gain);
 
     //convert to attenuation and update iobits for atr
-    float attn = wbx_rx_gain_ranges["PGA0"].max - gain;
+    float attn = wbx_rx_gain_ranges["PGA0"].stop() - gain;
 
     //calculate the attenuation
-    int attn_code = int(floor(attn*2));
+    int attn_code = boost::math::iround(attn*2);
     int iobits = ((~attn_code) << RX_ATTN_SHIFT) & RX_ATTN_MASK;
 
-    
     if (wbx_debug) std::cerr << boost::format(
         "WBX Attenuation: %f dB, Code: %d, IO Bits %x, Mask: %x"
     ) % attn % attn_code % (iobits & RX_ATTN_MASK) % RX_ATTN_MASK << std::endl;
 
     //the actual gain setting
-    gain = wbx_rx_gain_ranges["PGA0"].max - float(attn_code)/2;
+    gain = wbx_rx_gain_ranges["PGA0"].stop() - float(attn_code)/2;
 
     return iobits;
 }
 
 static float tx_pga0_gain_to_dac_volts(float &gain){
     //clip the input
-    gain = std::clip<float>(gain, wbx_tx_gain_ranges["PGA0"].min, wbx_tx_gain_ranges["PGA0"].max);
+    gain = wbx_tx_gain_ranges["PGA0"].clip(gain);
 
     //voltage level constants
     static const float max_volts = float(0.5), min_volts = float(1.4);
-    static const float slope = (max_volts-min_volts)/wbx_tx_gain_ranges["PGA0"].max;
+    static const float slope = (max_volts-min_volts)/wbx_tx_gain_ranges["PGA0"].stop();
 
     //calculate the voltage for the aux dac
     float dac_volts = gain*slope + min_volts;
@@ -328,7 +327,7 @@ double wbx_xcvr::set_lo_freq(
     ) % (target_freq/1e6) << std::endl;
 
     //clip the input
-    target_freq = std::clip(target_freq, wbx_freq_range.min, wbx_freq_range.max);
+    target_freq = wbx_freq_range.clip(target_freq);
 
     //map prescaler setting to mininmum integer divider (N) values (pg.18 prescaler)
     static const uhd::dict<int, int> prescaler_to_min_int_div = map_list_of
diff --git a/host/lib/usrp/dboard/db_xcvr2450.cpp b/host/lib/usrp/dboard/db_xcvr2450.cpp
index be0e42b92..a3a1e6242 100644
--- a/host/lib/usrp/dboard/db_xcvr2450.cpp
+++ b/host/lib/usrp/dboard/db_xcvr2450.cpp
@@ -72,8 +72,10 @@ using namespace boost::assign;
  **********************************************************************/
 static const bool xcvr2450_debug = false;
 
-static const freq_range_t xcvr_freq_range(2.4e9, 6.0e9);
-static const freq_range_t xcvr_freq_band_seperation(2.5e9, 4.9e9);
+static const freq_range_t xcvr_freq_range = list_of
+    (range_t<double>(2.4e9, 2.5e9))
+    (range_t<double>(4.9e9, 6.0e9))
+;
 
 static const prop_names_t xcvr_antennas = list_of("J1")("J2");
 
@@ -82,7 +84,11 @@ static const uhd::dict<std::string, gain_range_t> xcvr_tx_gain_ranges = map_list
     ("BB", gain_range_t(0, 5, 1.5))
 ;
 static const uhd::dict<std::string, gain_range_t> xcvr_rx_gain_ranges = map_list_of
-    ("LNA", gain_range_t(0, 30.5, 15))
+    ("LNA", gain_range_t(list_of
+        (range_t<float>(0))
+        (range_t<float>(15))
+        (range_t<float>(30.5))
+    ))
     ("VGA", gain_range_t(0, 62, 2.0))
 ;
 
@@ -212,10 +218,10 @@ xcvr2450::xcvr2450(ctor_args_t args) : xcvr_dboard_base(args){
     set_rx_ant(xcvr_antennas.at(0));
     set_tx_ant(xcvr_antennas.at(1));
     BOOST_FOREACH(const std::string &name, xcvr_tx_gain_ranges.keys()){
-        set_tx_gain(xcvr_tx_gain_ranges[name].min, name);
+        set_tx_gain(xcvr_tx_gain_ranges[name].start(), name);
     }
     BOOST_FOREACH(const std::string &name, xcvr_rx_gain_ranges.keys()){
-        set_rx_gain(xcvr_rx_gain_ranges[name].min, name);
+        set_rx_gain(xcvr_rx_gain_ranges[name].start(), name);
     }
 }
 
@@ -259,17 +265,9 @@ void xcvr2450::update_atr(void){
  * Tuning
  **********************************************************************/
 void xcvr2450::set_lo_freq(double target_freq){
-    //clip for highband and lowband
-    if((target_freq > xcvr_freq_band_seperation.min) and (target_freq < xcvr_freq_band_seperation.max)){
-        if(target_freq - xcvr_freq_band_seperation.min < xcvr_freq_band_seperation.max - target_freq){
-            target_freq = xcvr_freq_band_seperation.min;
-        }else{
-            target_freq = xcvr_freq_band_seperation.max;
-        }
-    }
 
-    //clip for max and min
-    target_freq = std::clip(target_freq, xcvr_freq_range.min, xcvr_freq_range.max);
+    //clip the input to the range
+    target_freq = xcvr_freq_range.clip(target_freq);
 
     //variables used in the calculation below
     double scaler = xcvr2450::is_highband(target_freq)? (4.0/5.0) : (4.0/3.0);
diff --git a/host/lib/usrp/mboard_eeprom.cpp b/host/lib/usrp/mboard_eeprom.cpp
index 076d0b279..e7470944c 100644
--- a/host/lib/usrp/mboard_eeprom.cpp
+++ b/host/lib/usrp/mboard_eeprom.cpp
@@ -57,49 +57,49 @@ static const byte_vector_t string_to_bytes(const std::string &string, size_t max
 }
 
 /***********************************************************************
- * Implementation of NXXX load/store
+ * Implementation of N100 load/store
  **********************************************************************/
-static const boost::uint8_t NXXX_EEPROM_ADDR = 0x50;
+static const boost::uint8_t N100_EEPROM_ADDR = 0x50;
 
-static const uhd::dict<std::string, boost::uint8_t> USRP_NXXX_OFFSETS = boost::assign::map_list_of
+static const uhd::dict<std::string, boost::uint8_t> USRP_N100_OFFSETS = boost::assign::map_list_of
     ("rev-lsb-msb", 0x00)
     ("mac-addr", 0x02)
-    ("ip-addr", 0x08)
+    ("ip-addr", 0x0C)
     //leave space here for other addresses (perhaps)
     ("serial", 0x18)
     ("name", 0x18 + SERIAL_LEN)
 ;
 
-static void load_nxxx(mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
+static void load_n100(mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
     //extract the revision number
-    byte_vector_t rev_lsb_msb = iface.read_eeprom(NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["rev-lsb-msb"], 2);
+    byte_vector_t rev_lsb_msb = iface.read_eeprom(N100_EEPROM_ADDR, USRP_N100_OFFSETS["rev-lsb-msb"], 2);
     boost::uint16_t rev = (boost::uint16_t(rev_lsb_msb.at(0)) << 0) | (boost::uint16_t(rev_lsb_msb.at(1)) << 8);
     mb_eeprom["rev"] = boost::lexical_cast<std::string>(rev);
 
     //extract the addresses
     mb_eeprom["mac-addr"] = mac_addr_t::from_bytes(iface.read_eeprom(
-        NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["mac-addr"], 6
+        N100_EEPROM_ADDR, USRP_N100_OFFSETS["mac-addr"], 6
     )).to_string();
 
     boost::asio::ip::address_v4::bytes_type ip_addr_bytes;
-    std::copy(iface.read_eeprom(NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["ip-addr"], 4), ip_addr_bytes);
+    std::copy(iface.read_eeprom(N100_EEPROM_ADDR, USRP_N100_OFFSETS["ip-addr"], 4), ip_addr_bytes);
     mb_eeprom["ip-addr"] = boost::asio::ip::address_v4(ip_addr_bytes).to_string();
 
     //extract the serial
     mb_eeprom["serial"] = bytes_to_string(iface.read_eeprom(
-        NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["serial"], SERIAL_LEN
+        N100_EEPROM_ADDR, USRP_N100_OFFSETS["serial"], SERIAL_LEN
     ));
 
     //extract the name
     mb_eeprom["name"] = bytes_to_string(iface.read_eeprom(
-        NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["name"], NAME_MAX_LEN
+        N100_EEPROM_ADDR, USRP_N100_OFFSETS["name"], NAME_MAX_LEN
     ));
 
     //empty serial correction: use the mac address
     if (mb_eeprom["serial"].empty()) mb_eeprom["serial"] = mb_eeprom["mac-addr"];
 }
 
-static void store_nxxx(const mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
+static void store_n100(const mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
     //parse the revision number
     if (mb_eeprom.has_key("rev")){
         boost::uint16_t rev = boost::lexical_cast<boost::uint16_t>(mb_eeprom["rev"]);
@@ -107,67 +107,67 @@ static void store_nxxx(const mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
             (boost::uint8_t(rev >> 0))
             (boost::uint8_t(rev >> 8))
         ;
-        iface.write_eeprom(NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["rev-lsb-msb"], rev_lsb_msb);
+        iface.write_eeprom(N100_EEPROM_ADDR, USRP_N100_OFFSETS["rev-lsb-msb"], rev_lsb_msb);
     }
 
     //store the addresses
     if (mb_eeprom.has_key("mac-addr")) iface.write_eeprom(
-        NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["mac-addr"],
+        N100_EEPROM_ADDR, USRP_N100_OFFSETS["mac-addr"],
         mac_addr_t::from_string(mb_eeprom["mac-addr"]).to_bytes()
     );
 
     if (mb_eeprom.has_key("ip-addr")){
         byte_vector_t ip_addr_bytes(4);
         std::copy(boost::asio::ip::address_v4::from_string(mb_eeprom["ip-addr"]).to_bytes(), ip_addr_bytes);
-        iface.write_eeprom(NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["ip-addr"], ip_addr_bytes);
+        iface.write_eeprom(N100_EEPROM_ADDR, USRP_N100_OFFSETS["ip-addr"], ip_addr_bytes);
     }
 
     //store the serial
     if (mb_eeprom.has_key("serial")) iface.write_eeprom(
-        NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["serial"],
+        N100_EEPROM_ADDR, USRP_N100_OFFSETS["serial"],
         string_to_bytes(mb_eeprom["serial"], SERIAL_LEN)
     );
 
     //store the name
     if (mb_eeprom.has_key("name")) iface.write_eeprom(
-        NXXX_EEPROM_ADDR, USRP_NXXX_OFFSETS["name"],
+        N100_EEPROM_ADDR, USRP_N100_OFFSETS["name"],
         string_to_bytes(mb_eeprom["name"], NAME_MAX_LEN)
     );
 }
 
 /***********************************************************************
- * Implementation of B1XX load/store
+ * Implementation of B000 load/store
  **********************************************************************/
-static const boost::uint8_t B1XX_EEPROM_ADDR = 0x50;
-static const size_t B1XXX_SERIAL_LEN = 8;
+static const boost::uint8_t B000_EEPROM_ADDR = 0x50;
+static const size_t B000_SERIAL_LEN = 8;
 
-static const uhd::dict<std::string, boost::uint8_t> USRP_B1XX_OFFSETS = boost::assign::map_list_of
+static const uhd::dict<std::string, boost::uint8_t> USRP_B000_OFFSETS = boost::assign::map_list_of
     ("serial", 0xf8)
     ("name", 0xf8 - NAME_MAX_LEN)
 ;
 
-static void load_b1xx(mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
+static void load_b000(mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
     //extract the serial
     mb_eeprom["serial"] = bytes_to_string(iface.read_eeprom(
-        B1XX_EEPROM_ADDR, USRP_B1XX_OFFSETS["serial"], B1XXX_SERIAL_LEN
+        B000_EEPROM_ADDR, USRP_B000_OFFSETS["serial"], B000_SERIAL_LEN
     ));
 
     //extract the name
     mb_eeprom["name"] = bytes_to_string(iface.read_eeprom(
-        B1XX_EEPROM_ADDR, USRP_B1XX_OFFSETS["name"], NAME_MAX_LEN
+        B000_EEPROM_ADDR, USRP_B000_OFFSETS["name"], NAME_MAX_LEN
     ));
 }
 
-static void store_b1xx(const mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
+static void store_b000(const mboard_eeprom_t &mb_eeprom, i2c_iface &iface){
     //store the serial
     if (mb_eeprom.has_key("serial")) iface.write_eeprom(
-        B1XX_EEPROM_ADDR, USRP_B1XX_OFFSETS["serial"],
-        string_to_bytes(mb_eeprom["serial"], B1XXX_SERIAL_LEN)
+        B000_EEPROM_ADDR, USRP_B000_OFFSETS["serial"],
+        string_to_bytes(mb_eeprom["serial"], B000_SERIAL_LEN)
     );
 
     //store the name
     if (mb_eeprom.has_key("name")) iface.write_eeprom(
-        B1XX_EEPROM_ADDR, USRP_B1XX_OFFSETS["name"],
+        B000_EEPROM_ADDR, USRP_B000_OFFSETS["name"],
         string_to_bytes(mb_eeprom["name"], NAME_MAX_LEN)
     );
 }
@@ -181,14 +181,14 @@ mboard_eeprom_t::mboard_eeprom_t(void){
 
 mboard_eeprom_t::mboard_eeprom_t(i2c_iface &iface, map_type map){
     switch(map){
-    case MAP_NXXX: load_nxxx(*this, iface); break;
-    case MAP_B1XX: load_b1xx(*this, iface); break;
+    case MAP_N100: load_n100(*this, iface); break;
+    case MAP_B000: load_b000(*this, iface); break;
     }
 }
 
 void mboard_eeprom_t::commit(i2c_iface &iface, map_type map){
     switch(map){
-    case MAP_NXXX: store_nxxx(*this, iface); break;
-    case MAP_B1XX: store_b1xx(*this, iface); break;
+    case MAP_N100: store_n100(*this, iface); break;
+    case MAP_B000: store_b000(*this, iface); break;
     }
 }
diff --git a/host/lib/usrp/usrp1/codec_ctrl.cpp b/host/lib/usrp/usrp1/codec_ctrl.cpp
index 4aa730573..18f794632 100644
--- a/host/lib/usrp/usrp1/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp1/codec_ctrl.cpp
@@ -160,19 +160,19 @@ usrp1_codec_ctrl_impl::~usrp1_codec_ctrl_impl(void)
 static const int mtpgw = 255; //maximum tx pga gain word
 
 void usrp1_codec_ctrl_impl::set_tx_pga_gain(float gain){
-    int gain_word = int(mtpgw*(gain - tx_pga_gain_range.min)/(tx_pga_gain_range.max - tx_pga_gain_range.min));
+    int gain_word = int(mtpgw*(gain - tx_pga_gain_range.start())/(tx_pga_gain_range.stop() - tx_pga_gain_range.start()));
     _ad9862_regs.tx_pga_gain = std::clip(gain_word, 0, mtpgw);
     this->send_reg(16);
 }
 
 float usrp1_codec_ctrl_impl::get_tx_pga_gain(void){
-    return (_ad9862_regs.tx_pga_gain*(tx_pga_gain_range.max - tx_pga_gain_range.min)/mtpgw) + tx_pga_gain_range.min;
+    return (_ad9862_regs.tx_pga_gain*(tx_pga_gain_range.stop() - tx_pga_gain_range.start())/mtpgw) + tx_pga_gain_range.start();
 }
 
 static const int mrpgw = 0x14; //maximum rx pga gain word
 
 void usrp1_codec_ctrl_impl::set_rx_pga_gain(float gain, char which){
-    int gain_word = int(mrpgw*(gain - rx_pga_gain_range.min)/(rx_pga_gain_range.max - rx_pga_gain_range.min));
+    int gain_word = int(mrpgw*(gain - rx_pga_gain_range.start())/(rx_pga_gain_range.stop() - rx_pga_gain_range.start()));
     gain_word = std::clip(gain_word, 0, mrpgw);
     switch(which){
     case 'A':
@@ -194,7 +194,7 @@ float usrp1_codec_ctrl_impl::get_rx_pga_gain(char which){
     case 'B': gain_word = _ad9862_regs.rx_pga_b; break;
     default: UHD_THROW_INVALID_CODE_PATH();
     }
-    return (gain_word*(rx_pga_gain_range.max - rx_pga_gain_range.min)/mrpgw) + rx_pga_gain_range.min;
+    return (gain_word*(rx_pga_gain_range.stop() - rx_pga_gain_range.start())/mrpgw) + rx_pga_gain_range.start();
 }
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp1/mboard_impl.cpp b/host/lib/usrp/usrp1/mboard_impl.cpp
index c1f0f1d38..4df5ada0a 100644
--- a/host/lib/usrp/usrp1/mboard_impl.cpp
+++ b/host/lib/usrp/usrp1/mboard_impl.cpp
@@ -380,8 +380,8 @@ void usrp1_impl::mboard_set(const wax::obj &key, const wax::obj &val)
     case MBOARD_PROP_EEPROM_MAP:
         // Step1: commit the map, writing only those values set.
         // Step2: readback the entire eeprom map into the iface.
-        val.as<mboard_eeprom_t>().commit(*_iface, mboard_eeprom_t::MAP_B1XX);
-        _iface->mb_eeprom = mboard_eeprom_t(*_iface, mboard_eeprom_t::MAP_B1XX);
+        val.as<mboard_eeprom_t>().commit(*_iface, mboard_eeprom_t::MAP_B000);
+        _iface->mb_eeprom = mboard_eeprom_t(*_iface, mboard_eeprom_t::MAP_B000);
         return;
 
     default: UHD_THROW_PROP_SET_ERROR();
diff --git a/host/lib/usrp/usrp1/usrp1_iface.cpp b/host/lib/usrp/usrp1/usrp1_iface.cpp
index 691c51fe8..63fcd5777 100644
--- a/host/lib/usrp/usrp1/usrp1_iface.cpp
+++ b/host/lib/usrp/usrp1/usrp1_iface.cpp
@@ -38,7 +38,7 @@ public:
     usrp1_iface_impl(usrp_ctrl::sptr ctrl_transport)
     {
         _ctrl_transport = ctrl_transport;
-        mb_eeprom = mboard_eeprom_t(*this, mboard_eeprom_t::MAP_B1XX);
+        mb_eeprom = mboard_eeprom_t(*this, mboard_eeprom_t::MAP_B000);
     }
 
     ~usrp1_iface_impl(void)
diff --git a/host/lib/usrp/usrp2/CMakeLists.txt b/host/lib/usrp/usrp2/CMakeLists.txt
index 078485d6a..f7984fce5 100644
--- a/host/lib/usrp/usrp2/CMakeLists.txt
+++ b/host/lib/usrp/usrp2/CMakeLists.txt
@@ -44,6 +44,8 @@ IF(ENABLE_USRP2)
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/dboard_impl.cpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/dboard_iface.cpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/dsp_impl.cpp
+        ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/gps_ctrl.hpp
+        ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/gps_ctrl.cpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/io_impl.cpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/mboard_impl.cpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/serdes_ctrl.cpp
@@ -53,6 +55,7 @@ IF(ENABLE_USRP2)
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/usrp2_impl.cpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/usrp2_impl.hpp
         ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/usrp2_regs.hpp
+        ${CMAKE_SOURCE_DIR}/lib/usrp/usrp2/usrp2_regs.cpp
     )
 ELSE(ENABLE_USRP2)
     MESSAGE(STATUS "  Skipping USRP2 support.")
diff --git a/host/lib/usrp/usrp2/clock_ctrl.cpp b/host/lib/usrp/usrp2/clock_ctrl.cpp
index 232f3b32a..428d5539b 100644
--- a/host/lib/usrp/usrp2/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp2/clock_ctrl.cpp
@@ -18,6 +18,7 @@
 #include "clock_ctrl.hpp"
 #include "ad9510_regs.hpp"
 #include "usrp2_regs.hpp" //spi slave constants
+#include "usrp2_clk_regs.hpp"
 #include <uhd/utils/assert.hpp>
 #include <boost/cstdint.hpp>
 #include <boost/lexical_cast.hpp>
@@ -32,9 +33,10 @@ class usrp2_clock_ctrl_impl : public usrp2_clock_ctrl{
 public:
     usrp2_clock_ctrl_impl(usrp2_iface::sptr iface){
         _iface = iface;
+        clk_regs = usrp2_clk_regs_t(_iface->get_rev());
 
         _ad9510_regs.cp_current_setting = ad9510_regs_t::CP_CURRENT_SETTING_3_0MA;
-        this->write_reg(0x09);
+        this->write_reg(clk_regs.pll_3);
 
         // Setup the clock registers to 100MHz:
         //  This was already done by the firmware (or the host couldnt communicate).
@@ -44,20 +46,20 @@ public:
 
         _ad9510_regs.pll_power_down = ad9510_regs_t::PLL_POWER_DOWN_NORMAL;
         _ad9510_regs.prescaler_value = ad9510_regs_t::PRESCALER_VALUE_DIV2;
-        this->write_reg(0x0A);
+        this->write_reg(clk_regs.pll_4);
 
         _ad9510_regs.acounter = 0;
-        this->write_reg(0x04);
+        this->write_reg(clk_regs.acounter);
 
         _ad9510_regs.bcounter_msb = 0;
         _ad9510_regs.bcounter_lsb = 5;
-        this->write_reg(0x05);
-        this->write_reg(0x06);
+        this->write_reg(clk_regs.bcounter_msb);
+        this->write_reg(clk_regs.bcounter_lsb);
 
         _ad9510_regs.ref_counter_msb = 0;
         _ad9510_regs.ref_counter_lsb = 1; // r divider = 1
-        this->write_reg(0x0B);
-        this->write_reg(0x0C);
+        this->write_reg(clk_regs.ref_counter_msb);
+        this->write_reg(clk_regs.ref_counter_lsb);
 
         /* regs will be updated in commands below */
 
@@ -84,16 +86,13 @@ public:
     }
 
     void enable_mimo_clock_out(bool enb){
-        boost::uint16_t rev = boost::lexical_cast<boost::uint16_t>(_iface->mb_eeprom["rev"]);
-        boost::uint8_t rev_hi = boost::uint8_t(rev >> 8);
-
         //calculate the low and high dividers
         size_t divider = size_t(this->get_master_clock_rate()/10e6);
         size_t high = divider/2;
         size_t low = divider - high;
 
-        switch(rev_hi){
-        case 3: //clock 2
+        switch(clk_regs.exp){
+        case 2: //U2 rev 3
             _ad9510_regs.power_down_lvpecl_out2 = enb?
                 ad9510_regs_t::POWER_DOWN_LVPECL_OUT2_NORMAL :
                 ad9510_regs_t::POWER_DOWN_LVPECL_OUT2_SAFE_PD;
@@ -102,11 +101,9 @@ public:
             _ad9510_regs.divider_low_cycles_out2 = low - 1;
             _ad9510_regs.divider_high_cycles_out2 = high - 1;
             _ad9510_regs.bypass_divider_out2 = 0;
-            this->write_reg(0x3e);
-            this->write_reg(0x4c);
             break;
 
-        case 4: //clock 5
+        case 5: //U2 rev 4
             _ad9510_regs.power_down_lvds_cmos_out5 = enb? 0 : 1;
             _ad9510_regs.lvds_cmos_select_out5 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT5_LVDS;
             _ad9510_regs.output_level_lvds_out5 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT5_1_75MA;
@@ -114,14 +111,23 @@ public:
             _ad9510_regs.divider_low_cycles_out5 = low - 1;
             _ad9510_regs.divider_high_cycles_out5 = high - 1;
             _ad9510_regs.bypass_divider_out5 = 0;
-            this->write_reg(0x41);
-            this->write_reg(0x52);
+            break;
+            
+        case 6: //U2+
+            _ad9510_regs.power_down_lvds_cmos_out6 = enb? 0 : 1;
+            _ad9510_regs.lvds_cmos_select_out6 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT6_LVDS;
+            _ad9510_regs.output_level_lvds_out6 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT6_1_75MA;
+            //set the registers (divider - 1)
+            _ad9510_regs.divider_low_cycles_out6 = low - 1;
+            _ad9510_regs.divider_high_cycles_out6 = high - 1;
+            _ad9510_regs.bypass_divider_out5 = 0;
             break;
 
-        //TODO FIXME do i want to throw, what about uninitialized boards?
-        //default: throw std::runtime_error("unknown rev hi in mboard eeprom");
-        default: std::cerr << "unknown rev hi: " << rev_hi << std::endl;
+        default:
+            break;
         }
+        this->write_reg(clk_regs.output(clk_regs.exp));
+        this->write_reg(clk_regs.div_lo(clk_regs.exp));
         this->update_regs();
     }
 
@@ -130,7 +136,7 @@ public:
         _ad9510_regs.power_down_lvds_cmos_out7 = enb? 0 : 1;
         _ad9510_regs.lvds_cmos_select_out7 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT7_CMOS;
         _ad9510_regs.output_level_lvds_out7 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT7_1_75MA;
-        this->write_reg(0x43);
+        this->write_reg(clk_regs.output(clk_regs.rx_db));
         this->update_regs();
     }
 
@@ -146,8 +152,8 @@ public:
         _ad9510_regs.divider_low_cycles_out7 = low - 1;
         _ad9510_regs.divider_high_cycles_out7 = high - 1;
         //write the registers
-        this->write_reg(0x56);
-        this->write_reg(0x57);
+        this->write_reg(clk_regs.div_lo(clk_regs.rx_db));
+        this->write_reg(clk_regs.div_hi(clk_regs.rx_db));
         this->update_regs();
     }
 
@@ -157,12 +163,22 @@ public:
         return rates;
     }
 
-    //uses output clock 6 (cmos)
+    //uses output clock 6 (cmos) on USRP2 and output clock 5 (cmos) on USRP2+
     void enable_tx_dboard_clock(bool enb){
-        _ad9510_regs.power_down_lvds_cmos_out6 = enb? 0 : 1;
-        _ad9510_regs.lvds_cmos_select_out6 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT6_CMOS;
-        _ad9510_regs.output_level_lvds_out6 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT6_1_75MA;
-        this->write_reg(0x42);
+        switch(clk_regs.tx_db) {
+        case 5: //USRP2+
+          _ad9510_regs.power_down_lvds_cmos_out5 = enb? 0 : 1;
+          _ad9510_regs.lvds_cmos_select_out5 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT5_CMOS;
+          _ad9510_regs.output_level_lvds_out5 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT5_1_75MA;
+          break;
+        case 6: //USRP2
+          _ad9510_regs.power_down_lvds_cmos_out6 = enb? 0 : 1;
+          _ad9510_regs.lvds_cmos_select_out6 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT6_CMOS;
+          _ad9510_regs.output_level_lvds_out6 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT6_1_75MA;
+          break;
+        }
+
+        this->write_reg(clk_regs.output(clk_regs.tx_db));
         this->update_regs();
     }
 
@@ -174,18 +190,44 @@ public:
         //calculate the low and high dividers
         size_t high = divider/2;
         size_t low = divider - high;
-        //set the registers (divider - 1)
-        _ad9510_regs.divider_low_cycles_out6 = low - 1;
-        _ad9510_regs.divider_high_cycles_out6 = high - 1;
+
+        switch(clk_regs.tx_db) {
+        case 5: //USRP2+
+          _ad9510_regs.bypass_divider_out5 = (divider == 1)? 1 : 0;
+          _ad9510_regs.divider_low_cycles_out5 = low - 1;
+          _ad9510_regs.divider_high_cycles_out5 = high - 1;
+          break;
+        case 6: //USRP2
+          //bypass when the divider ratio is one
+          _ad9510_regs.bypass_divider_out6 = (divider == 1)? 1 : 0;
+          //set the registers (divider - 1)
+          _ad9510_regs.divider_low_cycles_out6 = low - 1;
+          _ad9510_regs.divider_high_cycles_out6 = high - 1;
+          break;
+        }
+
         //write the registers
-        this->write_reg(0x54);
-        this->write_reg(0x55);
+        this->write_reg(clk_regs.div_hi(clk_regs.tx_db));
+        this->write_reg(clk_regs.div_lo(clk_regs.tx_db));
         this->update_regs();
     }
 
     std::vector<double> get_rates_tx_dboard_clock(void){
         return get_rates_rx_dboard_clock(); //same master clock, same dividers...
     }
+    
+    void enable_test_clock(bool enb) {
+        _ad9510_regs.power_down_lvpecl_out0 = enb?
+            ad9510_regs_t::POWER_DOWN_LVPECL_OUT0_NORMAL :
+            ad9510_regs_t::POWER_DOWN_LVPECL_OUT0_SAFE_PD;
+        _ad9510_regs.output_level_lvpecl_out0 = ad9510_regs_t::OUTPUT_LEVEL_LVPECL_OUT0_810MV;
+        _ad9510_regs.divider_low_cycles_out0 = 0;
+        _ad9510_regs.divider_high_cycles_out0 = 0;
+        _ad9510_regs.bypass_divider_out0 = 1;
+        this->write_reg(0x3c);
+        this->write_reg(0x48);
+        this->write_reg(0x49);
+    }
 
     /*!
      * If we are to use an external reference, enable the charge pump.
@@ -197,7 +239,7 @@ public:
             ad9510_regs_t::CHARGE_PUMP_MODE_3STATE ;
         _ad9510_regs.pll_mux_control = ad9510_regs_t::PLL_MUX_CONTROL_DLD_HIGH;
         _ad9510_regs.pfd_polarity = ad9510_regs_t::PFD_POLARITY_POS;
-        this->write_reg(0x08);
+        this->write_reg(clk_regs.pll_2);
         this->update_regs();
     }
 
@@ -220,33 +262,46 @@ private:
      */
     void update_regs(void){
         _ad9510_regs.update_registers = 1;
-        this->write_reg(0x5a);
+        this->write_reg(clk_regs.update);
     }
 
     //uses output clock 3 (pecl)
+    //this is the same between USRP2 and USRP2+ and doesn't get a switch statement
     void enable_dac_clock(bool enb){
         _ad9510_regs.power_down_lvpecl_out3 = (enb)?
             ad9510_regs_t::POWER_DOWN_LVPECL_OUT3_NORMAL :
             ad9510_regs_t::POWER_DOWN_LVPECL_OUT3_SAFE_PD;
         _ad9510_regs.output_level_lvpecl_out3 = ad9510_regs_t::OUTPUT_LEVEL_LVPECL_OUT3_810MV;
         _ad9510_regs.bypass_divider_out3 = 1;
-        this->write_reg(0x3F);
-        this->write_reg(0x4F);
+        this->write_reg(clk_regs.output(clk_regs.dac));
+        this->write_reg(clk_regs.div_hi(clk_regs.dac));
         this->update_regs();
     }
 
-    //uses output clock 4 (lvds)
+    //uses output clock 4 (lvds) on USRP2 and output clock 2 (lvpecl) on USRP2+
     void enable_adc_clock(bool enb){
-        _ad9510_regs.power_down_lvds_cmos_out4 = enb? 0 : 1;
-        _ad9510_regs.lvds_cmos_select_out4 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT4_LVDS;
-        _ad9510_regs.output_level_lvds_out4 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT4_1_75MA;
-        _ad9510_regs.bypass_divider_out4 = 1;
-        this->write_reg(0x40);
-        this->write_reg(0x51);
+        switch(clk_regs.adc) {
+        case 2:
+          _ad9510_regs.power_down_lvpecl_out2 = enb? ad9510_regs_t::POWER_DOWN_LVPECL_OUT2_NORMAL : ad9510_regs_t::POWER_DOWN_LVPECL_OUT2_SAFE_PD;
+          _ad9510_regs.output_level_lvpecl_out2 = ad9510_regs_t::OUTPUT_LEVEL_LVPECL_OUT2_500MV;
+          _ad9510_regs.bypass_divider_out2 = 1;
+          break;
+        case 4:
+          _ad9510_regs.power_down_lvds_cmos_out4 = enb? 0 : 1;
+          _ad9510_regs.lvds_cmos_select_out4 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT4_LVDS;
+          _ad9510_regs.output_level_lvds_out4 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT4_1_75MA;
+          _ad9510_regs.bypass_divider_out4 = 1;
+          break;
+        }
+
+        this->write_reg(clk_regs.output(clk_regs.adc));
+        this->write_reg(clk_regs.div_hi(clk_regs.adc));
         this->update_regs();
     }
-
+    
     usrp2_iface::sptr _iface;
+
+    usrp2_clk_regs_t clk_regs;
     ad9510_regs_t _ad9510_regs;
 };
 
diff --git a/host/lib/usrp/usrp2/clock_ctrl.hpp b/host/lib/usrp/usrp2/clock_ctrl.hpp
index 70a104a81..db6c52c83 100644
--- a/host/lib/usrp/usrp2/clock_ctrl.hpp
+++ b/host/lib/usrp/usrp2/clock_ctrl.hpp
@@ -83,6 +83,12 @@ public:
      * \param enb true to enable
      */
     virtual void enable_external_ref(bool enb) = 0;
+    
+    /*!
+     * Enable/disable test clock output.
+     * \param enb true to enable
+     */
+    virtual void enable_test_clock(bool enb) = 0;
 
     /*!
      * TODO other clock control api here....
diff --git a/host/lib/usrp/usrp2/codec_ctrl.cpp b/host/lib/usrp/usrp2/codec_ctrl.cpp
index 32cc13ded..ad1ae1acb 100644
--- a/host/lib/usrp/usrp2/codec_ctrl.cpp
+++ b/host/lib/usrp/usrp2/codec_ctrl.cpp
@@ -17,10 +17,12 @@
 
 #include "codec_ctrl.hpp"
 #include "ad9777_regs.hpp"
+#include "ads62p44_regs.hpp"
 #include "usrp2_regs.hpp"
 #include <boost/cstdint.hpp>
 #include <boost/foreach.hpp>
 #include <iostream>
+#include <uhd/utils/exception.hpp>
 
 static const bool codec_ctrl_debug = false;
 
@@ -57,7 +59,24 @@ public:
         }
 
         //power-up adc
-        _iface->poke32(U2_REG_MISC_CTRL_ADC, U2_FLAG_MISC_CTRL_ADC_ON);
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP2_REV3:
+        case usrp2_iface::USRP2_REV4:
+            _iface->poke32(_iface->regs.misc_ctrl_adc, U2_FLAG_MISC_CTRL_ADC_ON);
+            break;
+
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.reset = 1;
+            this->send_ads62p44_reg(0x00); //issue a reset to the ADC
+            //everything else should be pretty much default, i think
+            //_ads62p44_regs.decimation = DECIMATION_DECIMATE_1;
+            _ads62p44_regs.power_down = ads62p44_regs_t::POWER_DOWN_NORMAL;
+            this->send_ads62p44_reg(0x14);
+            break;
+
+        case usrp2_iface::USRP_NXXX: break;
+        }
     }
 
     ~usrp2_codec_ctrl_impl(void){
@@ -66,11 +85,62 @@ public:
         this->send_ad9777_reg(0);
 
         //power-down adc
-        _iface->poke32(U2_REG_MISC_CTRL_ADC, U2_FLAG_MISC_CTRL_ADC_OFF);
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP2_REV3:
+        case usrp2_iface::USRP2_REV4:
+            _iface->poke32(_iface->regs.misc_ctrl_adc, U2_FLAG_MISC_CTRL_ADC_OFF);
+            break;
+
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            //send a global power-down to the ADC here... it will get lifted on reset
+            _ads62p44_regs.power_down = ads62p44_regs_t::POWER_DOWN_GLOBAL_PD;
+            this->send_ads62p44_reg(0x14);
+            break;
+
+        case usrp2_iface::USRP_NXXX: break;
+        }
+    }
+
+    void set_rx_digital_gain(float gain) {  //fine digital gain
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.fine_gain = int(gain/0.5);
+            this->send_ads62p44_reg(0x17);
+            break;
+
+        default: UHD_THROW_INVALID_CODE_PATH();
+        }
+    }
+
+    void set_rx_digital_fine_gain(float gain) { //gain correction      
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.gain_correction = int(gain / 0.05);
+            this->send_ads62p44_reg(0x1A);
+            break;
+
+        default: UHD_THROW_INVALID_CODE_PATH();
+        }
+    }
+
+    void set_rx_analog_gain(bool gain) { //turns on/off analog 3.5dB preamp
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            _ads62p44_regs.coarse_gain = gain ? ads62p44_regs_t::COARSE_GAIN_3_5DB : ads62p44_regs_t::COARSE_GAIN_0DB;
+            this->send_ads62p44_reg(0x14);
+            break;
+
+        default: UHD_THROW_INVALID_CODE_PATH();
+        }
     }
 
 private:
     ad9777_regs_t _ad9777_regs;
+    ads62p44_regs_t _ads62p44_regs;
     usrp2_iface::sptr _iface;
 
     void send_ad9777_reg(boost::uint8_t addr){
@@ -81,6 +151,14 @@ private:
             reg, 16, false /*no rb*/
         );
     }
+
+    void send_ads62p44_reg(boost::uint8_t addr) {
+        boost::uint16_t reg = _ads62p44_regs.get_write_reg(addr);
+        _iface->transact_spi(
+            SPI_SS_ADS62P44, spi_config_t::EDGE_FALL,
+            reg, 16, false /*no rb*/
+        );
+    }
 };
 
 /***********************************************************************
diff --git a/host/lib/usrp/usrp2/codec_ctrl.hpp b/host/lib/usrp/usrp2/codec_ctrl.hpp
index ad014e0e1..57a37b94b 100644
--- a/host/lib/usrp/usrp2/codec_ctrl.hpp
+++ b/host/lib/usrp/usrp2/codec_ctrl.hpp
@@ -33,6 +33,27 @@ public:
      */
     static sptr make(usrp2_iface::sptr iface);
 
+    /*!
+     * Set the analog preamplifier on the USRP2+ ADC (ADS62P44).
+     * \param gain enable or disable the 3.5dB preamp
+     */
+
+    virtual void set_rx_analog_gain(bool gain) = 0;
+
+    /*!
+     * Set the digital gain on the USRP2+ ADC (ADS62P44).
+     * \param gain from 0-6dB
+     */
+
+    virtual void set_rx_digital_gain(float gain) = 0;
+
+    /*!
+     * Set the digital gain correction on the USRP2+ ADC (ADS62P44).
+     * \param gain from 0-0.5dB
+     */
+
+    virtual void set_rx_digital_fine_gain(float gain) = 0;
+
 };
 
 #endif /* INCLUDED_CODEC_CTRL_HPP */
diff --git a/host/lib/usrp/usrp2/codec_impl.cpp b/host/lib/usrp/usrp2/codec_impl.cpp
index fc917b102..e417bc340 100644
--- a/host/lib/usrp/usrp2/codec_impl.cpp
+++ b/host/lib/usrp/usrp2/codec_impl.cpp
@@ -17,10 +17,23 @@
 
 #include "usrp2_impl.hpp"
 #include <uhd/usrp/codec_props.hpp>
+#include <uhd/types/dict.hpp>
+#include <uhd/types/ranges.hpp>
 #include <boost/bind.hpp>
+#include <boost/assign/list_of.hpp>
+#include <uhd/utils/assert.hpp>
+#include <uhd/utils/exception.hpp>
 
 using namespace uhd;
 using namespace uhd::usrp;
+using namespace boost::assign;
+
+//this only applies to USRP2P
+static const uhd::dict<std::string, gain_range_t> codec_rx_gain_ranges = map_list_of
+                                  ("analog", gain_range_t(0, float(3.5), float(3.5)))
+                                  ("digital", gain_range_t(0, float(6.0), float(0.5)))
+                                  ("digital-fine", gain_range_t(0, float(0.5), float(0.05)));
+
 
 /***********************************************************************
  * Helper Methods
@@ -40,12 +53,27 @@ void usrp2_mboard_impl::codec_init(void){
 /***********************************************************************
  * RX Codec Properties
  **********************************************************************/
-void usrp2_mboard_impl::rx_codec_get(const wax::obj &key, wax::obj &val){
+void usrp2_mboard_impl::rx_codec_get(const wax::obj &key_, wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
 
     //handle the get request conditioned on the key
     switch(key.as<codec_prop_t>()){
     case CODEC_PROP_NAME:
-        val = std::string("usrp2 adc");
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            val = _iface->get_cname() + " adc - ads62p44";
+            break;
+
+        case usrp2_iface::USRP2_REV3:
+        case usrp2_iface::USRP2_REV4:
+            val = _iface->get_cname() + " adc - ltc2284";
+            break;
+
+        case usrp2_iface::USRP_NXXX:
+            val = _iface->get_cname() + " adc - ??????";
+            break;
+        }
         return;
 
     case CODEC_PROP_OTHERS:
@@ -53,26 +81,79 @@ void usrp2_mboard_impl::rx_codec_get(const wax::obj &key, wax::obj &val){
         return;
 
     case CODEC_PROP_GAIN_NAMES:
-        val = prop_names_t(); //no gain elements to be controlled
+        switch(_iface->get_rev()){
+        case usrp2_iface::USRP_N200:
+        case usrp2_iface::USRP_N210:
+            val = prop_names_t(codec_rx_gain_ranges.keys());
+            return;
+
+        default: val = prop_names_t();
+        }
+        return;
+
+    case CODEC_PROP_GAIN_I:
+    case CODEC_PROP_GAIN_Q:
+        assert_has(_codec_rx_gains.keys(), key.name, "codec rx gain name");
+        val = _codec_rx_gains[key.name];
         return;
 
+    case CODEC_PROP_GAIN_RANGE:
+      assert_has(codec_rx_gain_ranges.keys(), key.name, "codec rx gain range name");
+      val = codec_rx_gain_ranges[key.name];
+      return;
+
     default: UHD_THROW_PROP_GET_ERROR();
     }
 }
 
-void usrp2_mboard_impl::rx_codec_set(const wax::obj &, const wax::obj &){
-    UHD_THROW_PROP_SET_ERROR();
+void usrp2_mboard_impl::rx_codec_set(const wax::obj &key_, const wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
+
+    switch(key.as<codec_prop_t>()) {
+    case CODEC_PROP_GAIN_I:
+    case CODEC_PROP_GAIN_Q:
+        this->rx_codec_set_gain(val.as<float>(), key.name);
+        return;
+
+    default: UHD_THROW_PROP_SET_ERROR();
+  }
+}
+
+/***********************************************************************
+ * Helper function to set RX codec gain
+ ***********************************************************************/
+
+void usrp2_mboard_impl::rx_codec_set_gain(float gain, const std::string &name){
+  assert_has(codec_rx_gain_ranges.keys(), name, "codec rx gain name");
+
+  _codec_rx_gains[name] = gain;
+
+  if(name == "analog") {
+    _codec_ctrl->set_rx_analog_gain(gain > 0); //just turn it on or off
+    return;
+  }
+  if(name == "digital") {
+    _codec_ctrl->set_rx_digital_gain(gain);
+    return;
+  }
+  if(name == "digital-fine") {
+    _codec_ctrl->set_rx_digital_fine_gain(gain);
+    return;
+  }
+  UHD_THROW_PROP_SET_ERROR();
 }
 
+
 /***********************************************************************
  * TX Codec Properties
  **********************************************************************/
-void usrp2_mboard_impl::tx_codec_get(const wax::obj &key, wax::obj &val){
+void usrp2_mboard_impl::tx_codec_get(const wax::obj &key_, wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
 
     //handle the get request conditioned on the key
     switch(key.as<codec_prop_t>()){
     case CODEC_PROP_NAME:
-        val = std::string("usrp2 dac - ad9777");
+        val = _iface->get_cname() + " dac - ad9777";
         return;
 
     case CODEC_PROP_OTHERS:
diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp
index fdfbf0d17..ab5f62355 100644
--- a/host/lib/usrp/usrp2/dboard_iface.cpp
+++ b/host/lib/usrp/usrp2/dboard_iface.cpp
@@ -180,8 +180,8 @@ void usrp2_dboard_iface::set_pin_ctrl(unit_t unit, boost::uint16_t value){
 
     //write the selection mux value to register
     switch(unit){
-    case UNIT_RX: _iface->poke32(U2_REG_GPIO_RX_SEL, new_sels); return;
-    case UNIT_TX: _iface->poke32(U2_REG_GPIO_TX_SEL, new_sels); return;
+    case UNIT_RX: _iface->poke32(_iface->regs.gpio_rx_sel, new_sels); return;
+    case UNIT_TX: _iface->poke32(_iface->regs.gpio_tx_sel, new_sels); return;
     }
 }
 
@@ -189,18 +189,18 @@ void usrp2_dboard_iface::set_gpio_ddr(unit_t unit, boost::uint16_t value){
     _ddr_shadow = \
         (_ddr_shadow & ~(0xffff << unit_to_shift[unit])) |
         (boost::uint32_t(value) << unit_to_shift[unit]);
-    _iface->poke32(U2_REG_GPIO_DDR, _ddr_shadow);
+    _iface->poke32(_iface->regs.gpio_ddr, _ddr_shadow);
 }
 
 void usrp2_dboard_iface::write_gpio(unit_t unit, boost::uint16_t value){
     _gpio_shadow = \
         (_gpio_shadow & ~(0xffff << unit_to_shift[unit])) |
         (boost::uint32_t(value) << unit_to_shift[unit]);
-    _iface->poke32(U2_REG_GPIO_IO, _gpio_shadow);
+    _iface->poke32(_iface->regs.gpio_io, _gpio_shadow);
 }
 
 boost::uint16_t usrp2_dboard_iface::read_gpio(unit_t unit){
-    return boost::uint16_t(_iface->peek32(U2_REG_GPIO_IO) >> unit_to_shift[unit]);
+    return boost::uint16_t(_iface->peek32(_iface->regs.gpio_io) >> unit_to_shift[unit]);
 }
 
 void usrp2_dboard_iface::set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t value){
@@ -209,16 +209,16 @@ void usrp2_dboard_iface::set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t
         unit_t, uhd::dict<atr_reg_t, boost::uint32_t>
     > unit_to_atr_to_addr = map_list_of
         (UNIT_RX, map_list_of
-            (ATR_REG_IDLE,        U2_REG_ATR_IDLE_RXSIDE)
-            (ATR_REG_TX_ONLY,     U2_REG_ATR_INTX_RXSIDE)
-            (ATR_REG_RX_ONLY,     U2_REG_ATR_INRX_RXSIDE)
-            (ATR_REG_FULL_DUPLEX, U2_REG_ATR_FULL_RXSIDE)
+            (ATR_REG_IDLE,        _iface->regs.atr_idle_rxside)
+            (ATR_REG_TX_ONLY,     _iface->regs.atr_intx_rxside)
+            (ATR_REG_RX_ONLY,     _iface->regs.atr_inrx_rxside)
+            (ATR_REG_FULL_DUPLEX, _iface->regs.atr_full_rxside)
         )
         (UNIT_TX, map_list_of
-            (ATR_REG_IDLE,        U2_REG_ATR_IDLE_TXSIDE)
-            (ATR_REG_TX_ONLY,     U2_REG_ATR_INTX_TXSIDE)
-            (ATR_REG_RX_ONLY,     U2_REG_ATR_INRX_TXSIDE)
-            (ATR_REG_FULL_DUPLEX, U2_REG_ATR_FULL_TXSIDE)
+            (ATR_REG_IDLE,        _iface->regs.atr_idle_txside)
+            (ATR_REG_TX_ONLY,     _iface->regs.atr_intx_txside)
+            (ATR_REG_RX_ONLY,     _iface->regs.atr_inrx_txside)
+            (ATR_REG_FULL_DUPLEX, _iface->regs.atr_full_txside)
         )
     ;
     _iface->poke16(unit_to_atr_to_addr[unit][atr], value);
@@ -238,8 +238,8 @@ void usrp2_dboard_iface::set_gpio_debug(unit_t unit, int which){
 
     //write the selection mux value to register
     switch(unit){
-    case UNIT_RX: _iface->poke32(U2_REG_GPIO_RX_SEL, new_sels); return;
-    case UNIT_TX: _iface->poke32(U2_REG_GPIO_TX_SEL, new_sels); return;
+    case UNIT_RX: _iface->poke32(_iface->regs.gpio_rx_sel, new_sels); return;
+    case UNIT_TX: _iface->poke32(_iface->regs.gpio_tx_sel, new_sels); return;
     }
 }
 
diff --git a/host/lib/usrp/usrp2/dboard_impl.cpp b/host/lib/usrp/usrp2/dboard_impl.cpp
index 540c9fefb..4192c4f78 100644
--- a/host/lib/usrp/usrp2/dboard_impl.cpp
+++ b/host/lib/usrp/usrp2/dboard_impl.cpp
@@ -64,7 +64,7 @@ void usrp2_mboard_impl::rx_dboard_get(const wax::obj &key_, wax::obj &val){
     //handle the get request conditioned on the key
     switch(key.as<dboard_prop_t>()){
     case DBOARD_PROP_NAME:
-        val = std::string("usrp2 dboard (rx unit)");
+        val = _iface->get_cname() + " dboard (rx unit)";
         return;
 
     case DBOARD_PROP_SUBDEV:
@@ -121,7 +121,7 @@ void usrp2_mboard_impl::tx_dboard_get(const wax::obj &key_, wax::obj &val){
     //handle the get request conditioned on the key
     switch(key.as<dboard_prop_t>()){
     case DBOARD_PROP_NAME:
-        val = std::string("usrp2 dboard (tx unit)");
+        val = _iface->get_cname() + " dboard (tx unit)";
         return;
 
     case DBOARD_PROP_SUBDEV:
diff --git a/host/lib/usrp/usrp2/dsp_impl.cpp b/host/lib/usrp/usrp2/dsp_impl.cpp
index 0c85e643f..77ed594f5 100644
--- a/host/lib/usrp/usrp2/dsp_impl.cpp
+++ b/host/lib/usrp/usrp2/dsp_impl.cpp
@@ -61,7 +61,7 @@ void usrp2_mboard_impl::ddc_get(const wax::obj &key_, wax::obj &val){
 
     switch(key.as<dsp_prop_t>()){
     case DSP_PROP_NAME:
-        val = std::string("usrp2 ddc0");
+        val = _iface->get_cname() + " ddc0";
         return;
 
     case DSP_PROP_OTHERS:
@@ -95,7 +95,7 @@ void usrp2_mboard_impl::ddc_set(const wax::obj &key_, const wax::obj &val){
 
     case DSP_PROP_FREQ_SHIFT:{
             double new_freq = val.as<double>();
-            _iface->poke32(U2_REG_DSP_RX_FREQ,
+            _iface->poke32(_iface->regs.dsp_rx_freq,
                 dsp_type1::calc_cordic_word_and_update(new_freq, get_master_clock_freq())
             );
             _ddc_freq = new_freq; //shadow
@@ -107,11 +107,11 @@ void usrp2_mboard_impl::ddc_set(const wax::obj &key_, const wax::obj &val){
             _ddc_decim = pick_closest_rate(extact_rate, _allowed_decim_and_interp_rates);
 
             //set the decimation
-            _iface->poke32(U2_REG_DSP_RX_DECIM_RATE, dsp_type1::calc_cic_filter_word(_ddc_decim));
+            _iface->poke32(_iface->regs.dsp_rx_decim_rate, dsp_type1::calc_cic_filter_word(_ddc_decim));
 
             //set the scaling
             static const boost::int16_t default_rx_scale_iq = 1024;
-            _iface->poke32(U2_REG_DSP_RX_SCALE_IQ,
+            _iface->poke32(_iface->regs.dsp_rx_scale_iq,
                 dsp_type1::calc_iq_scale_word(default_rx_scale_iq, default_rx_scale_iq)
             );
         }
@@ -144,7 +144,7 @@ void usrp2_mboard_impl::duc_get(const wax::obj &key_, wax::obj &val){
 
     switch(key.as<dsp_prop_t>()){
     case DSP_PROP_NAME:
-        val = std::string("usrp2 duc0");
+        val = _iface->get_cname() + " duc0";
         return;
 
     case DSP_PROP_OTHERS:
@@ -178,7 +178,7 @@ void usrp2_mboard_impl::duc_set(const wax::obj &key_, const wax::obj &val){
 
     case DSP_PROP_FREQ_SHIFT:{
             double new_freq = val.as<double>();
-            _iface->poke32(U2_REG_DSP_TX_FREQ,
+            _iface->poke32(_iface->regs.dsp_tx_freq,
                 dsp_type1::calc_cordic_word_and_update(new_freq, get_master_clock_freq())
             );
             _duc_freq = new_freq; //shadow
@@ -190,10 +190,10 @@ void usrp2_mboard_impl::duc_set(const wax::obj &key_, const wax::obj &val){
             _duc_interp = pick_closest_rate(extact_rate, _allowed_decim_and_interp_rates);
 
             //set the interpolation
-            _iface->poke32(U2_REG_DSP_TX_INTERP_RATE, dsp_type1::calc_cic_filter_word(_duc_interp));
+            _iface->poke32(_iface->regs.dsp_tx_interp_rate, dsp_type1::calc_cic_filter_word(_duc_interp));
 
             //set the scaling
-            _iface->poke32(U2_REG_DSP_TX_SCALE_IQ, dsp_type1::calc_iq_scale_word(_duc_interp));
+            _iface->poke32(_iface->regs.dsp_tx_scale_iq, dsp_type1::calc_iq_scale_word(_duc_interp));
         }
         return;
 
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index 49508f46c..a9c39e650 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -52,6 +52,14 @@ extern "C" {
 #define	USRP2_I2C_ADDR_TX_DB  (USRP2_I2C_DEV_EEPROM | 0x4)
 #define	USRP2_I2C_ADDR_RX_DB  (USRP2_I2C_DEV_EEPROM | 0x5)
 
+////////////////////////////////////////////////////////////////////////
+// EEPROM Layout
+////////////////////////////////////////////////////////////////////////
+#define USRP2_EE_MBOARD_REV      0x00 //2 bytes, little-endian (historic, don't blame me)
+#define USRP2_EE_MBOARD_MAC_ADDR 0x02 //6 bytes
+#define USRP2_EE_MBOARD_IP_ADDR  0x0C //uint32, big-endian
+#define USRP2_EE_MBOARD_BOOTLOADER_FLAGS 0xF7
+
 typedef enum{
     USRP2_CTRL_ID_HUH_WHAT = ' ',
     //USRP2_CTRL_ID_FOR_SURE, //TODO error condition enums
@@ -75,6 +83,12 @@ typedef enum{
     USRP2_CTRL_ID_PEEK_AT_THIS_REGISTER_FOR_ME_BRO = 'r',
     USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE = 'R',
 
+    USRP2_CTRL_ID_HEY_WRITE_THIS_UART_FOR_ME_BRO = 'u',
+    USRP2_CTRL_ID_MAN_I_TOTALLY_WROTE_THAT_UART_DUDE = 'U',
+
+    USRP2_CTRL_ID_SO_LIKE_CAN_YOU_READ_THIS_UART_BRO = 'v',
+    USRP2_CTRL_ID_I_HELLA_READ_THAT_UART_DUDE = 'V',
+
     USRP2_CTRL_ID_PEACE_OUT = '~'
 
 } usrp2_ctrl_id_t;
@@ -115,6 +129,11 @@ typedef struct{
             __stdint(uint32_t) datahi;
             __stdint(uint8_t) num_bytes; //1, 2, 4, 8
         } poke_args;
+        struct {
+            __stdint(uint8_t) dev;
+            __stdint(uint8_t) bytes;
+            __stdint(uint8_t) data[20];
+        } uart_args;
     } data;
 } usrp2_ctrl_data_t;
 
diff --git a/host/lib/usrp/usrp2/gps_ctrl.cpp b/host/lib/usrp/usrp2/gps_ctrl.cpp
new file mode 100644
index 000000000..2273b2cd9
--- /dev/null
+++ b/host/lib/usrp/usrp2/gps_ctrl.cpp
@@ -0,0 +1,207 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "gps_ctrl.hpp"
+#include <uhd/utils/assert.hpp>
+#include <boost/cstdint.hpp>
+#include <string>
+#include <boost/date_time/posix_time/posix_time.hpp>
+#include <boost/thread.hpp>
+#include <boost/algorithm/string/trim.hpp>
+#include <boost/tokenizer.hpp>
+
+using namespace uhd;
+using namespace boost::gregorian;
+using namespace boost::posix_time;
+using namespace boost::algorithm;
+
+/*!
+ * A usrp2 GPS control for Jackson Labs devices
+ */
+
+//TODO: multiple baud rate support (requires mboard_impl changes for poking UART registers)
+class usrp2_gps_ctrl_impl : public usrp2_gps_ctrl{
+public:
+  usrp2_gps_ctrl_impl(usrp2_iface::sptr iface){
+    _iface = iface;
+
+    std::string reply;
+    bool i_heard_some_nmea = false, i_heard_something_weird = false;
+
+    gps_type = GPS_TYPE_NONE;
+
+//    set_uart_baud_rate(GPS_UART, 115200);
+    //first we look for a Jackson Labs Firefly (since that's what we sell with the USRP2+...)
+
+    _iface->read_uart(GPS_UART); //get whatever junk is in the rx buffer right now, and throw it away
+    _iface->write_uart(GPS_UART, "HAAAY GUYYYYS\n"); //to elicit a response from the Firefly
+
+    //then we loop until we either timeout, or until we get a response that indicates we're a JL device
+    int timeout = GPS_TIMEOUT_TRIES;
+    while(timeout--) {
+      reply = safe_gps_read();
+      if(trim_right_copy(reply) == "Command Error") {
+        gps_type = GPS_TYPE_JACKSON_LABS;
+        break;
+      }
+      else if(reply.substr(0, 3) == "$GP") i_heard_some_nmea = true; //but keep looking for that "Command Error" response
+      else if(reply.length() != 0) i_heard_something_weird = true; //probably wrong baud rate
+    }
+
+    if((i_heard_some_nmea) && (gps_type != GPS_TYPE_JACKSON_LABS)) gps_type = GPS_TYPE_GENERIC_NMEA;
+
+    //otherwise, we can try some other common baud rates looking to see if a GPS is connected (todo, later)
+    if((gps_type == GPS_TYPE_NONE) && i_heard_something_weird) {
+      std::cout << "Invalid reply, possible incorrect baud rate" << std::endl;
+    }
+
+    bool found_gprmc = false;
+
+    switch(gps_type) {
+    case GPS_TYPE_JACKSON_LABS:
+      std::cout << "Found a Jackson Labs GPS" << std::endl;
+      //issue some setup stuff so it spits out the appropriate data
+      //none of these should issue replies so we don't bother looking for them
+      //we have to sleep between commands because the JL device, despite not acking, takes considerable time to process each command.
+       boost::this_thread::sleep(boost::posix_time::milliseconds(FIREFLY_STUPID_DELAY_MS));
+      _iface->write_uart(GPS_UART, "SYST:COMM:SER:ECHO OFF\n");
+       boost::this_thread::sleep(boost::posix_time::milliseconds(FIREFLY_STUPID_DELAY_MS));
+      _iface->write_uart(GPS_UART, "SYST:COMM:SER:PRO OFF\n");
+       boost::this_thread::sleep(boost::posix_time::milliseconds(FIREFLY_STUPID_DELAY_MS));
+      _iface->write_uart(GPS_UART, "GPS:GPGGA 0\n");
+       boost::this_thread::sleep(boost::posix_time::milliseconds(FIREFLY_STUPID_DELAY_MS));
+      _iface->write_uart(GPS_UART, "GPS:GGAST 0\n");
+       boost::this_thread::sleep(boost::posix_time::milliseconds(FIREFLY_STUPID_DELAY_MS));
+      _iface->write_uart(GPS_UART, "GPS:GPRMC 1\n");
+       boost::this_thread::sleep(boost::posix_time::milliseconds(FIREFLY_STUPID_DELAY_MS));
+
+//      break;
+
+    case GPS_TYPE_GENERIC_NMEA:
+      if(gps_type == GPS_TYPE_GENERIC_NMEA) std::cout << "Found a generic NMEA GPS device" << std::endl;
+      found_gprmc = false;
+      //here we loop around looking for a GPRMC packet. if we don't get one, we don't have a usable GPS.
+      timeout = GPS_TIMEOUT_TRIES;
+      while(timeout--) {
+        reply = safe_gps_read();
+        if(reply.substr(0, 6) == "$GPRMC") {
+          found_gprmc = true;
+          break;
+        }
+      }
+      if(!found_gprmc) {
+        if(gps_type == GPS_TYPE_JACKSON_LABS) std::cout << "Firefly GPS not locked or warming up." << std::endl;
+        else std::cout << "GPS does not output GPRMC packets. Cannot retrieve time." << std::endl;
+        gps_type = GPS_TYPE_NONE;
+      }
+      break;
+
+    case GPS_TYPE_NONE:
+    default:
+      break;
+
+    }
+
+
+  }
+
+  ~usrp2_gps_ctrl_impl(void){
+
+  }
+
+  std::string safe_gps_read() {
+    std::string reply;
+    try {
+        reply = _iface->read_uart(GPS_UART);
+  	    //std::cerr << "Got reply from GPS: " << reply.c_str() << " with length = " << reply.length() << std::endl;
+    } catch (std::runtime_error err) {
+      if(err.what() != std::string("usrp2 no control response")) throw; //sorry can't cope with that
+      else { //we don't actually have a GPS installed
+        reply = std::string();
+      }
+    }
+    return reply;
+  }
+
+  ptime get_time(void) {
+    std::string reply;
+    ptime now;
+    boost::tokenizer<boost::escaped_list_separator<char> > tok(reply);
+    std::vector<std::string> toked;
+    int timeout = GPS_TIMEOUT_TRIES;
+    bool found_gprmc = false;
+    switch(gps_type) {
+    case GPS_TYPE_JACKSON_LABS: //deprecated in favor of a single NMEA parser
+    case GPS_TYPE_GENERIC_NMEA:
+
+      while(timeout--) {
+        reply = safe_gps_read();
+        if(reply.substr(0, 6) == "$GPRMC") {
+          found_gprmc = true;
+          break;
+        }
+      }
+      UHD_ASSERT_THROW(found_gprmc);
+
+      tok.assign(reply);
+      toked.assign(tok.begin(), tok.end());
+
+      UHD_ASSERT_THROW(toked.size() == 11); //if it's not we got something weird in there
+
+      now = ptime( date( 
+                         greg_year(boost::lexical_cast<int>(toked[8].substr(4, 2)) + 2000), //just trust me on this one
+                         greg_month(boost::lexical_cast<int>(toked[8].substr(2, 2))), 
+                         greg_day(boost::lexical_cast<int>(toked[8].substr(0, 2))) 
+                       ),
+                   hours(  boost::lexical_cast<int>(toked[1].substr(0, 2)))
+                 + minutes(boost::lexical_cast<int>(toked[1].substr(2, 2)))
+                 + seconds(boost::lexical_cast<int>(toked[1].substr(4, 2)))
+                 );
+      break;
+    case GPS_TYPE_NONE:
+    default:
+      throw std::runtime_error("get_time(): Unsupported GPS or no GPS detected\n");
+      break;
+    }
+    return now;
+  }
+
+  bool gps_detected(void) {
+    return (gps_type != GPS_TYPE_NONE);
+  }
+
+private:
+  usrp2_iface::sptr _iface;
+
+  enum {
+    GPS_TYPE_JACKSON_LABS,
+    GPS_TYPE_GENERIC_NMEA,
+    GPS_TYPE_NONE
+  } gps_type;
+
+  static const int GPS_UART = 2; //TODO: this should be plucked from fw_common.h or memory_map.h or somewhere in common with the firmware
+  static const int GPS_TIMEOUT_TRIES = 5;
+  static const int FIREFLY_STUPID_DELAY_MS = 200;
+
+};
+
+/***********************************************************************
+ * Public make function for the GPS control
+ **********************************************************************/
+usrp2_gps_ctrl::sptr usrp2_gps_ctrl::make(usrp2_iface::sptr iface){
+    return sptr(new usrp2_gps_ctrl_impl(iface));
+}
diff --git a/host/lib/usrp/usrp2/gps_ctrl.hpp b/host/lib/usrp/usrp2/gps_ctrl.hpp
new file mode 100644
index 000000000..5936a6fb6
--- /dev/null
+++ b/host/lib/usrp/usrp2/gps_ctrl.hpp
@@ -0,0 +1,53 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_GPS_CTRL_HPP
+#define INCLUDED_GPS_CTRL_HPP
+
+#include "usrp2_iface.hpp"
+#include <boost/shared_ptr.hpp>
+#include <boost/utility.hpp>
+#include <boost/date_time/posix_time/posix_time_types.hpp>
+
+using namespace boost::posix_time;
+
+class usrp2_gps_ctrl : boost::noncopyable{
+public:
+  typedef boost::shared_ptr<usrp2_gps_ctrl> sptr;
+
+  /*!
+   * Make a GPS config for Jackson Labs or generic NMEA GPS devices
+   */
+  static sptr make(usrp2_iface::sptr iface);
+
+  /*!
+   * Get the current GPS time and date
+   * \return current GPS time and date as boost::posix_time::ptime object
+   */
+  virtual ptime get_time(void) = 0;
+
+  /*!
+   * Tell you if there's a supported GPS connected or not
+   * \return true if a supported GPS is connected
+   */
+  virtual bool gps_detected(void) = 0;
+
+  //TODO: other fun things you can do with a GPS.
+
+};
+
+#endif /* INCLUDED_CLOCK_CTRL_HPP */
diff --git a/host/lib/usrp/usrp2/io_impl.cpp b/host/lib/usrp/usrp2/io_impl.cpp
index 844df603c..7b10e383e 100644
--- a/host/lib/usrp/usrp2/io_impl.cpp
+++ b/host/lib/usrp/usrp2/io_impl.cpp
@@ -164,6 +164,7 @@ struct usrp2_impl::io_impl{
     bool recv_pirate_crew_raiding;
     alignment_buffer_type::sptr recv_pirate_booty;
     bounded_buffer<async_metadata_t>::sptr async_msg_fifo;
+    boost::mutex spawn_mutex;
 };
 
 /***********************************************************************
@@ -180,6 +181,8 @@ void usrp2_impl::io_impl::recv_pirate_loop(
     recv_pirate_crew_raiding = true;
     size_t next_packet_seq = 0;
 
+    spawn_mutex.unlock();
+
     while(recv_pirate_crew_raiding){
         managed_recv_buffer::sptr buff = zc_if->get_recv_buff();
         if (not buff.get()) continue; //ignore timeout/error buffers
@@ -252,11 +255,17 @@ void usrp2_impl::io_init(void){
 
     //create a new pirate thread for each zc if (yarr!!)
     for (size_t i = 0; i < _data_transports.size(); i++){
+        //ensure a non-blocking mutex lock
+        _io_impl->spawn_mutex.unlock();
+        _io_impl->spawn_mutex.lock();
+        //spawn a new pirate to plunder the recv booty
         _io_impl->recv_pirate_crew.create_thread(boost::bind(
             &usrp2_impl::io_impl::recv_pirate_loop,
             _io_impl.get(), _data_transports.at(i),
             _mboards.at(i), i
         ));
+        //will block here until the thread unlocks
+        _io_impl->spawn_mutex.lock();
     }
 }
 
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index d4dc8a4bd..92b1d0be9 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -25,9 +25,11 @@
 #include <uhd/utils/algorithm.hpp>
 #include <boost/bind.hpp>
 #include <iostream>
+#include <boost/date_time/posix_time/posix_time.hpp>
 
 using namespace uhd;
 using namespace uhd::usrp;
+using namespace boost::posix_time;
 
 /***********************************************************************
  * Structors
@@ -57,6 +59,9 @@ usrp2_mboard_impl::usrp2_mboard_impl(
     _clock_ctrl = usrp2_clock_ctrl::make(_iface);
     _codec_ctrl = usrp2_codec_ctrl::make(_iface);
     _serdes_ctrl = usrp2_serdes_ctrl::make(_iface);
+    //_gps_ctrl = usrp2_gps_ctrl::make(_iface);
+
+    //if(_gps_ctrl->gps_detected()) std::cout << "GPS time: " << _gps_ctrl->get_time() << std::endl;
 
     //TODO move to dsp impl...
     //load the allowed decim/interp rates
@@ -72,36 +77,42 @@ usrp2_mboard_impl::usrp2_mboard_impl(
         _allowed_decim_and_interp_rates.push_back(i);
     }
 
-    //init the rx control registers
-    _iface->poke32(U2_REG_TX_CTRL_CLEAR_STATE, 1); //reset
-    _iface->poke32(U2_REG_RX_CTRL_NSAMPS_PER_PKT, recv_samps_per_packet);
-    _iface->poke32(U2_REG_RX_CTRL_NCHANNELS, 1);
-    _iface->poke32(U2_REG_RX_CTRL_VRT_HEADER, 0
+
+    //Issue a stop streaming command (in case it was left running).
+    //Since this command is issued before the networking is setup,
+    //most if not all junk packets will never make it to the socket.
+    this->issue_ddc_stream_cmd(stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS);
+
+    //setup the vrt rx registers
+    _iface->poke32(_iface->regs.rx_ctrl_nsamps_per_pkt, recv_samps_per_packet);
+    _iface->poke32(_iface->regs.rx_ctrl_nchannels, 1);
+    _iface->poke32(_iface->regs.rx_ctrl_clear_overrun, 1); //reset
+    _iface->poke32(_iface->regs.rx_ctrl_vrt_header, 0
         | (0x1 << 28) //if data with stream id
         | (0x1 << 26) //has trailer
         | (0x3 << 22) //integer time other
         | (0x1 << 20) //fractional time sample count
     );
-    _iface->poke32(U2_REG_RX_CTRL_VRT_STREAM_ID, 0);
-    _iface->poke32(U2_REG_RX_CTRL_VRT_TRAILER, 0);
-    _iface->poke32(U2_REG_TIME64_TPS, size_t(get_master_clock_freq()));
+    _iface->poke32(_iface->regs.rx_ctrl_vrt_stream_id, 0);
+    _iface->poke32(_iface->regs.rx_ctrl_vrt_trailer, 0);
+    _iface->poke32(_iface->regs.time64_tps, size_t(get_master_clock_freq()));
 
     //init the tx control registers
-    _iface->poke32(U2_REG_TX_CTRL_CLEAR_STATE, 1); //reset
-    _iface->poke32(U2_REG_TX_CTRL_NUM_CHAN, 0);    //1 channel
-    _iface->poke32(U2_REG_TX_CTRL_REPORT_SID, 1);  //sid 1 (different from rx)
-    _iface->poke32(U2_REG_TX_CTRL_POLICY, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET);
+    _iface->poke32(_iface->regs.tx_ctrl_num_chan, 0);    //1 channel
+    _iface->poke32(_iface->regs.tx_ctrl_clear_state, 1); //reset
+    _iface->poke32(_iface->regs.tx_ctrl_report_sid, 1);  //sid 1 (different from rx)
+    _iface->poke32(_iface->regs.tx_ctrl_policy, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET);
 
     //setting the cycles per update
     const double ups_per_sec = flow_control_hints.cast<double>("ups_per_sec", 100);
     const size_t cycles_per_up = size_t(_clock_ctrl->get_master_clock_rate()/ups_per_sec);
-    _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up);
-    _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, 0); //cycles per update is disabled
+    _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up);
+    _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, 0); //cycles per update is disabled
 
     //setting the packets per update
     const double ups_per_fifo = flow_control_hints.cast<double>("ups_per_fifo", 8);
     const size_t packets_per_up = size_t(usrp2_impl::sram_bytes/ups_per_fifo/data_transport->get_send_frame_size());
-    _iface->poke32(U2_REG_TX_CTRL_PACKETS_PER_UP, U2_FLAG_TX_CTRL_UP_ENB | packets_per_up);
+    _iface->poke32(_iface->regs.tx_ctrl_packets_per_up, U2_FLAG_TX_CTRL_UP_ENB | packets_per_up);
 
     //init the ddc
     init_ddc_config();
@@ -124,8 +135,8 @@ usrp2_mboard_impl::usrp2_mboard_impl(
 }
 
 usrp2_mboard_impl::~usrp2_mboard_impl(void){
-    _iface->poke32(U2_REG_TX_CTRL_CYCLES_PER_UP, 0);
-    _iface->poke32(U2_REG_TX_CTRL_PACKETS_PER_UP, 0);
+    _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, 0);
+    _iface->poke32(_iface->regs.tx_ctrl_packets_per_up, 0);
 }
 
 /***********************************************************************
@@ -148,42 +159,57 @@ void usrp2_mboard_impl::update_clock_config(void){
     switch(_clock_config.pps_source){
     case clock_config_t::PPS_SMA:  pps_flags |= U2_FLAG_TIME64_PPS_SMA;  break;
     case clock_config_t::PPS_MIMO: pps_flags |= U2_FLAG_TIME64_PPS_MIMO; break;
-    default: throw std::runtime_error("usrp2: unhandled clock configuration pps source");
+    default: throw std::runtime_error("unhandled clock configuration pps source");
     }
 
     //translate pps polarity enums
     switch(_clock_config.pps_polarity){
     case clock_config_t::PPS_POS: pps_flags |= U2_FLAG_TIME64_PPS_POSEDGE; break;
     case clock_config_t::PPS_NEG: pps_flags |= U2_FLAG_TIME64_PPS_NEGEDGE; break;
-    default: throw std::runtime_error("usrp2: unhandled clock configuration pps polarity");
+    default: throw std::runtime_error("unhandled clock configuration pps polarity");
     }
 
     //set the pps flags
-    _iface->poke32(U2_REG_TIME64_FLAGS, pps_flags);
+    _iface->poke32(_iface->regs.time64_flags, pps_flags);
 
     //clock source ref 10mhz
-    switch(_clock_config.ref_source){
-    case clock_config_t::REF_INT : _iface->poke32(U2_REG_MISC_CTRL_CLOCK, 0x10); break;
-    case clock_config_t::REF_SMA : _iface->poke32(U2_REG_MISC_CTRL_CLOCK, 0x1C); break;
-    case clock_config_t::REF_MIMO: _iface->poke32(U2_REG_MISC_CTRL_CLOCK, 0x15); break;
-    default: throw std::runtime_error("usrp2: unhandled clock configuration reference source");
-    }
+    switch(_iface->get_rev()){
+    case usrp2_iface::USRP_N200:
+    case usrp2_iface::USRP_N210:
+        switch(_clock_config.ref_source){
+        case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x12); break;
+        case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break;
+        case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break;
+        default: throw std::runtime_error("unhandled clock configuration reference source");
+        }
+        _clock_ctrl->enable_external_ref(true); //USRP2P has an internal 10MHz TCXO
+        break;
+
+    case usrp2_iface::USRP2_REV3:
+    case usrp2_iface::USRP2_REV4:
+        switch(_clock_config.ref_source){
+        case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x10); break;
+        case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break;
+        case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break;
+        default: throw std::runtime_error("unhandled clock configuration reference source");
+        }
+        _clock_ctrl->enable_external_ref(_clock_config.ref_source != clock_config_t::REF_INT);
+        break;
 
-    //clock source ref 10mhz
-    bool use_external = _clock_config.ref_source != clock_config_t::REF_INT;
-    _clock_ctrl->enable_external_ref(use_external);
+    case usrp2_iface::USRP_NXXX: break;
+    }
 }
 
 void usrp2_mboard_impl::set_time_spec(const time_spec_t &time_spec, bool now){
     //set the ticks
-    _iface->poke32(U2_REG_TIME64_TICKS, time_spec.get_tick_count(get_master_clock_freq()));
+    _iface->poke32(_iface->regs.time64_ticks, time_spec.get_tick_count(get_master_clock_freq()));
 
     //set the flags register
     boost::uint32_t imm_flags = (now)? U2_FLAG_TIME64_LATCH_NOW : U2_FLAG_TIME64_LATCH_NEXT_PPS;
-    _iface->poke32(U2_REG_TIME64_IMM, imm_flags);
+    _iface->poke32(_iface->regs.time64_imm, imm_flags);
 
     //set the seconds (latches in all 3 registers)
-    _iface->poke32(U2_REG_TIME64_SECS, boost::uint32_t(time_spec.get_full_secs()));
+    _iface->poke32(_iface->regs.time64_secs, boost::uint32_t(time_spec.get_full_secs()));
 }
 
 void usrp2_mboard_impl::handle_overflow(void){
@@ -194,9 +220,9 @@ void usrp2_mboard_impl::handle_overflow(void){
 
 void usrp2_mboard_impl::issue_ddc_stream_cmd(const stream_cmd_t &stream_cmd){
     _continuous_streaming = stream_cmd.stream_mode == stream_cmd_t::STREAM_MODE_START_CONTINUOUS;
-    _iface->poke32(U2_REG_RX_CTRL_STREAM_CMD, dsp_type1::calc_stream_cmd_word(stream_cmd));
-    _iface->poke32(U2_REG_RX_CTRL_TIME_SECS,  boost::uint32_t(stream_cmd.time_spec.get_full_secs()));
-    _iface->poke32(U2_REG_RX_CTRL_TIME_TICKS, stream_cmd.time_spec.get_tick_count(get_master_clock_freq()));
+    _iface->poke32(_iface->regs.rx_ctrl_stream_cmd, dsp_type1::calc_stream_cmd_word(stream_cmd));
+    _iface->poke32(_iface->regs.rx_ctrl_time_secs,  boost::uint32_t(stream_cmd.time_spec.get_full_secs()));
+    _iface->poke32(_iface->regs.rx_ctrl_time_ticks, stream_cmd.time_spec.get_tick_count(get_master_clock_freq()));
 }
 
 /***********************************************************************
@@ -206,11 +232,10 @@ static const std::string dboard_name = "0";
 
 void usrp2_mboard_impl::get(const wax::obj &key_, wax::obj &val){
     named_prop_t key = named_prop_t::extract(key_);
-
     //handle the get request conditioned on the key
     switch(key.as<mboard_prop_t>()){
     case MBOARD_PROP_NAME:
-        val = str(boost::format("usrp2 mboard%d - rev %s") % _index % _iface->mb_eeprom["rev"]);
+        val = _iface->get_cname() + " mboard";
         return;
 
     case MBOARD_PROP_OTHERS:
@@ -259,7 +284,7 @@ void usrp2_mboard_impl::get(const wax::obj &key_, wax::obj &val){
 
     case MBOARD_PROP_TIME_NOW:{
             usrp2_iface::pair64 time64(
-                _iface->peek64(U2_REG_TIME64_SECS_RB, U2_REG_TIME64_TICKS_RB)
+                _iface->peek64(_iface->regs.time64_secs_rb, _iface->regs.time64_ticks_rb)
             );
             val = time_spec_t(
                 time64.first, time64.second, get_master_clock_freq()
@@ -287,8 +312,7 @@ void usrp2_mboard_impl::get(const wax::obj &key_, wax::obj &val){
  * MBoard Set Properties
  **********************************************************************/
 void usrp2_mboard_impl::set(const wax::obj &key, const wax::obj &val){
-
-    //handle the get request conditioned on the key
+    //handle the set request conditioned on the key
     switch(key.as<mboard_prop_t>()){
 
     case MBOARD_PROP_CLOCK_CONFIG:
@@ -314,7 +338,7 @@ void usrp2_mboard_impl::set(const wax::obj &key, const wax::obj &val){
         //sanity check
         UHD_ASSERT_THROW(_rx_subdev_spec.size() == 1);
         //set the mux
-        _iface->poke32(U2_REG_DSP_RX_MUX, dsp_type1::calc_rx_mux_word(
+        _iface->poke32(_iface->regs.dsp_rx_mux, dsp_type1::calc_rx_mux_word(
             _dboard_manager->get_rx_subdev(_rx_subdev_spec.front().sd_name)[SUBDEV_PROP_CONNECTION].as<subdev_conn_t>()
         ));
         return;
@@ -325,7 +349,7 @@ void usrp2_mboard_impl::set(const wax::obj &key, const wax::obj &val){
         //sanity check
         UHD_ASSERT_THROW(_tx_subdev_spec.size() == 1);
         //set the mux
-        _iface->poke32(U2_REG_DSP_TX_MUX, dsp_type1::calc_tx_mux_word(
+        _iface->poke32(_iface->regs.dsp_tx_mux, dsp_type1::calc_tx_mux_word(
             _dboard_manager->get_tx_subdev(_tx_subdev_spec.front().sd_name)[SUBDEV_PROP_CONNECTION].as<subdev_conn_t>()
         ));
         return;
@@ -333,8 +357,8 @@ void usrp2_mboard_impl::set(const wax::obj &key, const wax::obj &val){
     case MBOARD_PROP_EEPROM_MAP:
         // Step1: commit the map, writing only those values set.
         // Step2: readback the entire eeprom map into the iface.
-        val.as<mboard_eeprom_t>().commit(*_iface, mboard_eeprom_t::MAP_NXXX);
-        _iface->mb_eeprom = mboard_eeprom_t(*_iface, mboard_eeprom_t::MAP_NXXX);
+        val.as<mboard_eeprom_t>().commit(*_iface, mboard_eeprom_t::MAP_N100);
+        _iface->mb_eeprom = mboard_eeprom_t(*_iface, mboard_eeprom_t::MAP_N100);
         return;
 
     default: UHD_THROW_PROP_SET_ERROR();
diff --git a/host/lib/usrp/usrp2/serdes_ctrl.cpp b/host/lib/usrp/usrp2/serdes_ctrl.cpp
index e83dceb96..1cda22f45 100644
--- a/host/lib/usrp/usrp2/serdes_ctrl.cpp
+++ b/host/lib/usrp/usrp2/serdes_ctrl.cpp
@@ -27,11 +27,11 @@ class usrp2_serdes_ctrl_impl : public usrp2_serdes_ctrl{
 public:
     usrp2_serdes_ctrl_impl(usrp2_iface::sptr iface){
         _iface = iface;
-        _iface->poke32(U2_REG_MISC_CTRL_SERDES, U2_FLAG_MISC_CTRL_SERDES_ENABLE | U2_FLAG_MISC_CTRL_SERDES_RXEN);
+        _iface->poke32(_iface->regs.misc_ctrl_serdes, U2_FLAG_MISC_CTRL_SERDES_ENABLE | U2_FLAG_MISC_CTRL_SERDES_RXEN);
     }
 
     ~usrp2_serdes_ctrl_impl(void){
-        _iface->poke32(U2_REG_MISC_CTRL_SERDES, 0); //power-down
+        _iface->poke32(_iface->regs.misc_ctrl_serdes, 0); //power-down
     }
 
 private:
diff --git a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp
new file mode 100644
index 000000000..6c46d0a35
--- /dev/null
+++ b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp
@@ -0,0 +1,85 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_USRP2_CLK_REGS_HPP
+#define INCLUDED_USRP2_CLK_REGS_HPP
+
+#include "usrp2_iface.hpp"
+
+class usrp2_clk_regs_t {
+public:
+  usrp2_clk_regs_t(void) { ; }
+  usrp2_clk_regs_t(usrp2_iface::rev_type rev) {
+    test = 0;
+    fpga = 1;
+    dac = 3;
+
+    switch(rev) {
+    case usrp2_iface::USRP2_REV3:
+        exp = 2;
+        adc = 4;
+        serdes = 2;
+        tx_db = 6;
+        break;
+    case usrp2_iface::USRP2_REV4:
+        exp = 5;
+        adc = 4;
+        serdes = 2;
+        tx_db = 6;
+        break;
+    case usrp2_iface::USRP_N200:
+    case usrp2_iface::USRP_N210:
+        exp = 6;
+        adc = 2;
+        serdes = 4;
+        tx_db = 5;
+        break;
+    case usrp2_iface::USRP_NXXX:
+        //dont throw, it may be unitialized
+        break;
+    }
+    
+    rx_db = 7;
+  }
+
+  static int output(int clknum) { return 0x3C + clknum; }
+  static int div_lo(int clknum) { return 0x48 + 2 * clknum; }
+  static int div_hi(int clknum) { return 0x49 + 2 * clknum; }
+
+  const static int acounter = 0x04;
+  const static int bcounter_msb = 0x05;
+  const static int bcounter_lsb = 0x06;
+  const static int pll_1 = 0x07;
+  const static int pll_2 = 0x08;
+  const static int pll_3 = 0x09;
+  const static int pll_4 = 0x0A;
+  const static int ref_counter_msb = 0x0B;
+  const static int ref_counter_lsb = 0x0C;
+  const static int pll_5 = 0x0D;
+  const static int update = 0x5A;
+
+  int test;
+  int fpga;
+  int adc;
+  int dac;
+  int serdes;
+  int exp;
+  int tx_db;
+  int rx_db;
+};
+
+#endif //INCLUDED_USRP2_CLK_REGS_HPP
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index ad265fd4c..81bc80c88 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -17,6 +17,7 @@
 
 #include "usrp2_regs.hpp"
 #include "usrp2_iface.hpp"
+#include <uhd/utils/exception.hpp>
 #include <uhd/utils/assert.hpp>
 #include <uhd/types/dict.hpp>
 #include <boost/thread.hpp>
@@ -24,6 +25,7 @@
 #include <boost/asio.hpp> //used for htonl and ntohl
 #include <boost/assign/list_of.hpp>
 #include <boost/format.hpp>
+#include <boost/tokenizer.hpp>
 #include <stdexcept>
 #include <algorithm>
 
@@ -39,16 +41,28 @@ public:
     usrp2_iface_impl(udp_simple::sptr ctrl_transport){
         _ctrl_transport = ctrl_transport;
 
-         //check the fpga compatibility number
-        const boost::uint32_t fpga_compat_num = this->peek32(U2_REG_COMPAT_NUM_RB);
+        mb_eeprom = mboard_eeprom_t(*this, mboard_eeprom_t::MAP_N100);
+        switch(this->get_rev()){
+        case USRP2_REV3:
+        case USRP2_REV4:
+            regs = usrp2_get_regs(false);
+            break;
+
+        case USRP_NXXX:
+        case USRP_N200:
+        case USRP_N210:
+            regs = usrp2_get_regs(true);
+            break;
+        }
+
+        //check the fpga compatibility number
+        const boost::uint32_t fpga_compat_num = this->peek32(this->regs.compat_num_rb);
         if (fpga_compat_num != USRP2_FPGA_COMPAT_NUM){
             throw std::runtime_error(str(boost::format(
                 "Expected fpga compatibility number %d, but got %d:\n"
                 "The fpga build is not compatible with the host code build."
             ) % int(USRP2_FPGA_COMPAT_NUM) % fpga_compat_num));
         }
-
-        mb_eeprom = mboard_eeprom_t(*this, mboard_eeprom_t::MAP_NXXX);
     }
 
     ~usrp2_iface_impl(void){
@@ -163,6 +177,58 @@ public:
     }
 
 /***********************************************************************
+ * UART
+ **********************************************************************/
+    void write_uart(boost::uint8_t dev, const std::string &buf){
+      //first tokenize the string into 20-byte substrings
+      boost::offset_separator f(20, 1, true, true);
+      boost::tokenizer<boost::offset_separator> tok(buf, f);
+      std::vector<std::string> queue(tok.begin(), tok.end());
+
+      BOOST_FOREACH(std::string item, queue) {
+        //setup the out data
+        usrp2_ctrl_data_t out_data;
+        out_data.id = htonl(USRP2_CTRL_ID_HEY_WRITE_THIS_UART_FOR_ME_BRO);
+        out_data.data.uart_args.dev = dev;
+        out_data.data.uart_args.bytes = item.size();
+
+        //limitation of uart transaction size
+        UHD_ASSERT_THROW(item.size() <= sizeof(out_data.data.uart_args.data));
+
+        //copy in the data
+        std::copy(item.begin(), item.end(), out_data.data.uart_args.data);
+
+        //send and recv
+        usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data);
+        UHD_ASSERT_THROW(ntohl(in_data.id) == USRP2_CTRL_ID_MAN_I_TOTALLY_WROTE_THAT_UART_DUDE);
+      }
+    }
+
+    std::string read_uart(boost::uint8_t dev){
+    	int readlen = 20;
+      std::string result;
+    	while(readlen == 20) { //while we keep receiving full packets
+        //setup the out data
+        usrp2_ctrl_data_t out_data;
+        out_data.id = htonl(USRP2_CTRL_ID_SO_LIKE_CAN_YOU_READ_THIS_UART_BRO);
+        out_data.data.uart_args.dev = dev;
+        out_data.data.uart_args.bytes = 20;
+
+        //limitation of uart transaction size
+        //UHD_ASSERT_THROW(num_bytes <= sizeof(out_data.data.uart_args.data));
+
+        //send and recv
+        usrp2_ctrl_data_t in_data = this->ctrl_send_and_recv(out_data);
+        UHD_ASSERT_THROW(ntohl(in_data.id) == USRP2_CTRL_ID_I_HELLA_READ_THAT_UART_DUDE);
+        readlen = in_data.data.uart_args.bytes;
+
+        //copy out the data
+        result += std::string((const char *)in_data.data.uart_args.data, (size_t)readlen);
+      }
+      return result;
+    }
+
+/***********************************************************************
  * Send/Recv over control
  **********************************************************************/
     usrp2_ctrl_data_t ctrl_send_and_recv(const usrp2_ctrl_data_t &out_data){
@@ -191,7 +257,28 @@ public:
             if (len == 0) break; //timeout
             //didnt get seq or bad packet, continue looking...
         }
-        throw std::runtime_error("usrp2 no control response");
+        throw std::runtime_error(this->get_cname() + ": no control response");
+    }
+
+    rev_type get_rev(void){
+        switch (boost::lexical_cast<boost::uint16_t>(mb_eeprom["rev"])){
+        case 0x0300: return USRP2_REV3;
+        case 0x0400: return USRP2_REV4;
+        case 0x0A00: return USRP_N200;
+        case 0x0A01: return USRP_N210;
+        }
+        return USRP_NXXX; //unknown type
+    }
+
+    const std::string get_cname(void){
+        switch(this->get_rev()){
+        case USRP2_REV3: return "USRP2-REV3";
+        case USRP2_REV4: return "USRP2-REV4";
+        case USRP_N200: return "USRP-N200";
+        case USRP_N210: return "USRP-N210";
+        case USRP_NXXX: return "USRP-N???";
+        }
+        UHD_THROW_INVALID_CODE_PATH();
     }
 
 private:
@@ -230,7 +317,6 @@ private:
         UHD_ASSERT_THROW(ntohl(in_data.id) == USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE);
         return T(ntohl(in_data.data.poke_args.data));
     }
-
 };
 
 /***********************************************************************
@@ -239,3 +325,4 @@ private:
 usrp2_iface::sptr usrp2_iface::make(udp_simple::sptr ctrl_transport){
     return usrp2_iface::sptr(new usrp2_iface_impl(ctrl_transport));
 }
+
diff --git a/host/lib/usrp/usrp2/usrp2_iface.hpp b/host/lib/usrp/usrp2/usrp2_iface.hpp
index bf36cbf6e..af3ed6c9f 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.hpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.hpp
@@ -25,7 +25,9 @@
 #include <boost/utility.hpp>
 #include <boost/cstdint.hpp>
 #include <utility>
+#include <string>
 #include "fw_common.h"
+#include "usrp2_regs.hpp"
 
 /*!
  * The usrp2 interface class:
@@ -104,6 +106,30 @@ public:
         bool readback
     ) = 0;
 
+    virtual void write_uart(boost::uint8_t dev, const std::string &buf) = 0;
+
+    virtual std::string read_uart(boost::uint8_t dev) = 0;
+
+    //! The list of possible revision types
+    enum rev_type {
+        USRP2_REV3 = 3,
+        USRP2_REV4 = 4,
+        USRP_N200 = 200,
+        USRP_N210 = 210,
+        USRP_NXXX = 0
+    };
+
+    //! Get the revision type for this device
+    virtual rev_type get_rev(void) = 0;
+
+    //! Get the canonical name for this device
+    virtual const std::string get_cname(void) = 0;
+
+    /*!
+     * Register map selected from USRP2/USRP2+.
+     */
+    usrp2_regs_t regs;
+
     //motherboard eeprom map structure
     uhd::usrp::mboard_eeprom_t mb_eeprom;
 };
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index e2b3c2cdc..610e2f404 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -217,8 +217,8 @@ void usrp2_impl::get(const wax::obj &key_, wax::obj &val){
     //handle the get request conditioned on the key
     switch(key.as<device_prop_t>()){
     case DEVICE_PROP_NAME:
-        if (_mboards.size() > 1) val = std::string("usrp2 mimo device");
-        else                     val = std::string("usrp2 device");
+        if (_mboards.size() > 1) val = std::string("USRP-NXXX mimo device");
+        else                     val = std::string("USRP-NXXX device");
         return;
 
     case DEVICE_PROP_MBOARD:
diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp
index e41cefc10..ede777323 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.hpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.hpp
@@ -21,6 +21,7 @@
 #include "usrp2_iface.hpp"
 #include "clock_ctrl.hpp"
 #include "codec_ctrl.hpp"
+#include "gps_ctrl.hpp"
 #include "serdes_ctrl.hpp"
 #include <uhd/device.hpp>
 #include <uhd/utils/pimpl.hpp>
@@ -105,6 +106,7 @@ private:
     usrp2_clock_ctrl::sptr _clock_ctrl;
     usrp2_codec_ctrl::sptr _codec_ctrl;
     usrp2_serdes_ctrl::sptr _serdes_ctrl;
+    usrp2_gps_ctrl::sptr _gps_ctrl;
 
     //properties for this mboard
     void get(const wax::obj &, wax::obj &);
@@ -131,6 +133,9 @@ private:
     wax_obj_proxy::sptr _rx_codec_proxy;
     wax_obj_proxy::sptr _tx_codec_proxy;
 
+    void rx_codec_set_gain(float, const std::string &);
+    uhd::dict<std::string, float> _codec_rx_gains;
+
     //properties interface for rx dboard
     void rx_dboard_get(const wax::obj &, wax::obj &);
     void rx_dboard_set(const wax::obj &, const wax::obj &);
diff --git a/host/lib/usrp/usrp2/usrp2_regs.cpp b/host/lib/usrp/usrp2/usrp2_regs.cpp
new file mode 100644
index 000000000..dd0433816
--- /dev/null
+++ b/host/lib/usrp/usrp2/usrp2_regs.cpp
@@ -0,0 +1,102 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program.  If not, see <http://www.gnu.org/licenses/>.
+//
+
+#include "usrp2_regs.hpp"
+#include "usrp2_iface.hpp"
+
+int sr_addr(int misc_output_base, int sr) {
+	return misc_output_base + 4 * sr;
+}
+
+usrp2_regs_t usrp2_get_regs(bool use_n2xx_map) {
+
+  //how about you just make this dependent on hw_rev instead of doing the init before main, and give up the const globals, since the application won't ever need both.
+  const int misc_output_base = (use_n2xx_map) ? USRP2P_MISC_OUTPUT_BASE : USRP2_MISC_OUTPUT_BASE,
+            gpio_base        = (use_n2xx_map) ? USRP2P_GPIO_BASE        : USRP2_GPIO_BASE,
+            atr_base         = (use_n2xx_map) ? USRP2P_ATR_BASE         : USRP2_ATR_BASE,
+            bp_base          = (use_n2xx_map) ? USRP2P_BP_STATUS_BASE   : USRP2_BP_STATUS_BASE;
+
+  usrp2_regs_t x;
+  x.sr_misc = 0;
+  x.sr_tx_prot_eng = 32;
+  x.sr_rx_prot_eng = 48;
+  x.sr_buffer_pool_ctrl = 64;
+  x.sr_udp_sm = 96;
+  x.sr_tx_dsp = 208;
+  x.sr_tx_ctrl = 224;
+  x.sr_rx_dsp = 160;
+  x.sr_rx_ctrl = 176;
+  x.sr_time64 = 192;
+  x.sr_simtimer = 198;
+  x.sr_last = 255;
+  x.misc_ctrl_clock = sr_addr(misc_output_base, 0);
+  x.misc_ctrl_serdes = sr_addr(misc_output_base, 1);
+  x.misc_ctrl_adc = sr_addr(misc_output_base, 2);
+  x.misc_ctrl_leds = sr_addr(misc_output_base, 3);
+  x.misc_ctrl_phy = sr_addr(misc_output_base, 4);
+  x.misc_ctrl_dbg_mux = sr_addr(misc_output_base, 5);
+  x.misc_ctrl_ram_page = sr_addr(misc_output_base, 6);
+  x.misc_ctrl_flush_icache = sr_addr(misc_output_base, 7);
+  x.misc_ctrl_led_src = sr_addr(misc_output_base, 8);
+  x.time64_secs = sr_addr(misc_output_base, x.sr_time64 + 0);
+  x.time64_ticks = sr_addr(misc_output_base, x.sr_time64 + 1);
+  x.time64_flags = sr_addr(misc_output_base, x.sr_time64 + 2);
+  x.time64_imm = sr_addr(misc_output_base, x.sr_time64 + 3);
+  x.time64_tps = sr_addr(misc_output_base, x.sr_time64 + 4);
+  x.time64_secs_rb = bp_base + 4*10;
+  x.time64_ticks_rb = bp_base + 4*11;
+  x.compat_num_rb = bp_base + 4*12;
+  x.dsp_tx_freq = sr_addr(misc_output_base, x.sr_tx_dsp + 0);
+  x.dsp_tx_scale_iq = sr_addr(misc_output_base, x.sr_tx_dsp + 1);
+  x.dsp_tx_interp_rate = sr_addr(misc_output_base, x.sr_tx_dsp + 2);
+  x.dsp_tx_mux = sr_addr(misc_output_base, x.sr_tx_dsp + 4);
+  x.dsp_rx_freq = sr_addr(misc_output_base, x.sr_rx_dsp + 0);
+  x.dsp_rx_scale_iq = sr_addr(misc_output_base, x.sr_rx_dsp + 1);
+  x.dsp_rx_decim_rate = sr_addr(misc_output_base, x.sr_rx_dsp + 2);
+  x.dsp_rx_dcoffset_i = sr_addr(misc_output_base, x.sr_rx_dsp + 3);
+  x.dsp_rx_dcoffset_q = sr_addr(misc_output_base, x.sr_rx_dsp + 4);
+  x.dsp_rx_mux = sr_addr(misc_output_base, x.sr_rx_dsp + 5);
+  x.gpio_io = gpio_base + 0;
+  x.gpio_ddr = gpio_base + 4;
+  x.gpio_tx_sel = gpio_base + 8;
+  x.gpio_rx_sel = gpio_base + 12;
+  x.atr_idle_txside = atr_base + 0;
+  x.atr_idle_rxside = atr_base + 2;
+  x.atr_intx_txside = atr_base + 4;
+  x.atr_intx_rxside = atr_base + 6;
+  x.atr_inrx_txside = atr_base + 8;
+  x.atr_inrx_rxside = atr_base + 10;
+  x.atr_full_txside = atr_base + 12;
+  x.atr_full_rxside = atr_base + 14;
+  x.rx_ctrl_stream_cmd = sr_addr(misc_output_base, x.sr_rx_ctrl + 0);
+  x.rx_ctrl_time_secs = sr_addr(misc_output_base, x.sr_rx_ctrl + 1);
+  x.rx_ctrl_time_ticks = sr_addr(misc_output_base, x.sr_rx_ctrl + 2);
+  x.rx_ctrl_clear_overrun = sr_addr(misc_output_base, x.sr_rx_ctrl + 3);
+  x.rx_ctrl_vrt_header = sr_addr(misc_output_base, x.sr_rx_ctrl + 4);
+  x.rx_ctrl_vrt_stream_id = sr_addr(misc_output_base, x.sr_rx_ctrl + 5);
+  x.rx_ctrl_vrt_trailer = sr_addr(misc_output_base, x.sr_rx_ctrl + 6);
+  x.rx_ctrl_nsamps_per_pkt = sr_addr(misc_output_base, x.sr_rx_ctrl + 7);
+  x.rx_ctrl_nchannels = sr_addr(misc_output_base, x.sr_rx_ctrl + 8);
+  x.tx_ctrl_num_chan = sr_addr(misc_output_base, x.sr_tx_ctrl + 0);
+  x.tx_ctrl_clear_state = sr_addr(misc_output_base, x.sr_tx_ctrl + 1);
+  x.tx_ctrl_report_sid = sr_addr(misc_output_base, x.sr_tx_ctrl + 2);
+  x.tx_ctrl_policy = sr_addr(misc_output_base, x.sr_tx_ctrl + 3);
+  x.tx_ctrl_cycles_per_up = sr_addr(misc_output_base, x.sr_tx_ctrl + 4);
+  x.tx_ctrl_packets_per_up = sr_addr(misc_output_base, x.sr_tx_ctrl + 5);
+
+  return x;
+}
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index cef7cf2e6..9936d634a 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -18,6 +18,93 @@
 #ifndef INCLUDED_USRP2_REGS_HPP
 #define INCLUDED_USRP2_REGS_HPP
 
+#include <boost/cstdint.hpp>
+
+#define USRP2_MISC_OUTPUT_BASE  0xD400
+#define USRP2_GPIO_BASE         0xC800
+#define USRP2_ATR_BASE          0xE400
+#define USRP2_BP_STATUS_BASE    0xCC00
+
+#define USRP2P_MISC_OUTPUT_BASE 0x2000
+#define USRP2P_GPIO_BASE        0x3200
+#define USRP2P_ATR_BASE         0x3800
+#define USRP2P_BP_STATUS_BASE   0x3300
+
+typedef struct {
+    int sr_misc;
+    int sr_tx_prot_eng;
+    int sr_rx_prot_eng;
+    int sr_buffer_pool_ctrl;
+    int sr_udp_sm;
+    int sr_tx_dsp;
+    int sr_tx_ctrl;
+    int sr_rx_dsp;
+    int sr_rx_ctrl;
+    int sr_time64;
+    int sr_simtimer;
+    int sr_last;
+    int misc_ctrl_clock;
+    int misc_ctrl_serdes;
+    int misc_ctrl_adc;
+    int misc_ctrl_leds;
+    int misc_ctrl_phy;
+    int misc_ctrl_dbg_mux;
+    int misc_ctrl_ram_page;
+    int misc_ctrl_flush_icache;
+    int misc_ctrl_led_src;
+    int time64_secs; // value to set absolute secs to on next PPS
+    int time64_ticks; // value to set absolute ticks to on next PPS
+    int time64_flags; // flags -- see chart below
+    int time64_imm; // set immediate (0=latch on next pps, 1=latch immediate, default=0)
+    int time64_tps; // ticks per second rollover count
+    int time64_secs_rb;
+    int time64_ticks_rb;
+    int compat_num_rb;
+    int dsp_tx_freq;
+    int dsp_tx_scale_iq;
+    int dsp_tx_interp_rate;
+    int dsp_tx_mux;
+    int dsp_rx_freq;
+    int dsp_rx_scale_iq;
+    int dsp_rx_decim_rate;
+    int dsp_rx_dcoffset_i;
+    int dsp_rx_dcoffset_q;
+    int dsp_rx_mux;
+    int gpio_base;
+    int gpio_io;
+    int gpio_ddr;
+    int gpio_tx_sel;
+    int gpio_rx_sel;
+    int atr_base;
+    int atr_idle_txside;
+    int atr_idle_rxside;
+    int atr_intx_txside;
+    int atr_intx_rxside;
+    int atr_inrx_txside;
+    int atr_inrx_rxside;
+    int atr_full_txside;
+    int atr_full_rxside;
+    int rx_ctrl_stream_cmd;
+    int rx_ctrl_time_secs;
+    int rx_ctrl_time_ticks;
+    int rx_ctrl_clear_overrun;
+    int rx_ctrl_vrt_header;
+    int rx_ctrl_vrt_stream_id;
+    int rx_ctrl_vrt_trailer;
+    int rx_ctrl_nsamps_per_pkt;
+    int rx_ctrl_nchannels;
+    int tx_ctrl_num_chan;
+    int tx_ctrl_clear_state;
+    int tx_ctrl_report_sid;
+    int tx_ctrl_policy;
+    int tx_ctrl_cycles_per_up;
+    int tx_ctrl_packets_per_up;
+} usrp2_regs_t;
+
+extern const usrp2_regs_t usrp2_regs; //the register definitions, set in usrp2_regs.cpp and usrp2p_regs.cpp
+
+usrp2_regs_t usrp2_get_regs(bool);
+
 ////////////////////////////////////////////////////
 // Settings Bus, Slave #7, Not Byte Addressable!
 //
@@ -25,27 +112,12 @@
 // 1KB of address space (== 256 32-bit write-only regs)
 
 
-#define MISC_OUTPUT_BASE        0xD400
+//#define MISC_OUTPUT_BASE        0xD400
 //#define TX_PROTOCOL_ENGINE_BASE 0xD480
 //#define RX_PROTOCOL_ENGINE_BASE 0xD4C0
 //#define BUFFER_POOL_CTRL_BASE   0xD500
 //#define LAST_SETTING_REG        0xD7FC  // last valid setting register
 
-#define SR_MISC 0
-#define SR_TX_PROT_ENG 32
-#define SR_RX_PROT_ENG 48
-#define SR_BUFFER_POOL_CTRL 64
-#define SR_UDP_SM 96
-#define SR_TX_DSP 208
-#define SR_TX_CTRL 224
-#define SR_RX_DSP 160
-#define SR_RX_CTRL 176
-#define SR_TIME64 192
-#define SR_SIMTIMER 198
-#define SR_LAST 255
-
-#define _SR_ADDR(sr)    ((MISC_OUTPUT_BASE) + (4*(sr)))
-
 /////////////////////////////////////////////////
 // SPI Slave Constants
 ////////////////////////////////////////////////
@@ -58,20 +130,11 @@
 #define SPI_SS_TX_DAC   32
 #define SPI_SS_TX_ADC   64
 #define SPI_SS_TX_DB   128
+#define SPI_SS_ADS62P44 256 //for usrp2p
 
 /////////////////////////////////////////////////
 // Misc Control
 ////////////////////////////////////////////////
-#define U2_REG_MISC_CTRL_CLOCK           _SR_ADDR(0)
-#define U2_REG_MISC_CTRL_SERDES          _SR_ADDR(1)
-#define U2_REG_MISC_CTRL_ADC             _SR_ADDR(2)
-#define U2_REG_MISC_CTRL_LEDS            _SR_ADDR(3)
-#define U2_REG_MISC_CTRL_PHY             _SR_ADDR(4) // LSB is reset line to eth phy
-#define U2_REG_MISC_CTRL_DBG_MUX         _SR_ADDR(5)
-#define U2_REG_MISC_CTRL_RAM_PAGE        _SR_ADDR(6) // FIXME should go somewhere else...
-#define U2_REG_MISC_CTRL_FLUSH_ICACHE    _SR_ADDR(7) // Flush the icache
-#define U2_REG_MISC_CTRL_LED_SRC         _SR_ADDR(8) // HW or SW control for LEDs
-
 #define U2_FLAG_MISC_CTRL_SERDES_ENABLE 8
 #define U2_FLAG_MISC_CTRL_SERDES_PRBSEN 4
 #define U2_FLAG_MISC_CTRL_SERDES_LOOPEN 2
@@ -99,15 +162,6 @@
    *
    * </pre>
    */
-#define U2_REG_TIME64_SECS  _SR_ADDR(SR_TIME64 + 0)  // value to set absolute secs to on next PPS
-#define U2_REG_TIME64_TICKS _SR_ADDR(SR_TIME64 + 1)  // value to set absolute ticks to on next PPS
-#define U2_REG_TIME64_FLAGS _SR_ADDR(SR_TIME64 + 2)  // flags - see chart above
-#define U2_REG_TIME64_IMM   _SR_ADDR(SR_TIME64 + 3)  // set immediate (0=latch on next pps, 1=latch immediate, default=0)
-#define U2_REG_TIME64_TPS   _SR_ADDR(SR_TIME64 + 4)  // the ticks per second rollover count
-
-#define U2_REG_TIME64_SECS_RB  (0xCC00 + 4*10)
-#define U2_REG_TIME64_TICKS_RB (0xCC00 + 4*11)
-#define U2_REG_COMPAT_NUM_RB   (0xCC00 + 4*12)
 
 //pps flags (see above)
 #define U2_FLAG_TIME64_PPS_NEGEDGE (0 << 0)
@@ -121,34 +175,72 @@
 /////////////////////////////////////////////////
 // DSP TX Regs
 ////////////////////////////////////////////////
-#define U2_REG_DSP_TX_FREQ         _SR_ADDR(SR_TX_DSP + 0)
-#define U2_REG_DSP_TX_SCALE_IQ     _SR_ADDR(SR_TX_DSP + 1) // {scale_i,scale_q}
-#define U2_REG_DSP_TX_INTERP_RATE  _SR_ADDR(SR_TX_DSP + 2)
-#define U2_REG_DSP_TX_MUX  _SR_ADDR(SR_TX_DSP + 4)
+
+  /*!
+   * \brief output mux configuration.
+   *
+   * <pre>
+   *     3                   2                   1                       
+   *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   *  +-------------------------------+-------+-------+-------+-------+
+   *  |                                               | DAC1  |  DAC0 |
+   *  +-------------------------------+-------+-------+-------+-------+
+   * 
+   *  There are N DUCs (1 now) with complex inputs and outputs.
+   *  There are two DACs.
+   * 
+   *  Each 4-bit DACx field specifies the source for the DAC
+   *  Each subfield is coded like this: 
+   * 
+   *     3 2 1 0
+   *    +-------+
+   *    |   N   |
+   *    +-------+
+   * 
+   *  N specifies which DUC output is connected to this DAC.
+   * 
+   *   N   which interp output
+   *  ---  -------------------
+   *   0   DUC 0 I
+   *   1   DUC 0 Q
+   *   2   DUC 1 I
+   *   3   DUC 1 Q
+   *   F   All Zeros
+   *   
+   * The default value is 0x10
+   * </pre>
+   */
+
 
 /////////////////////////////////////////////////
 // DSP RX Regs
 ////////////////////////////////////////////////
-#define U2_REG_DSP_RX_FREQ         _SR_ADDR(SR_RX_DSP + 0)
-#define U2_REG_DSP_RX_SCALE_IQ     _SR_ADDR(SR_RX_DSP + 1) // {scale_i,scale_q}
-#define U2_REG_DSP_RX_DECIM_RATE   _SR_ADDR(SR_RX_DSP + 2)
-#define U2_REG_DSP_RX_DCOFFSET_I   _SR_ADDR(SR_RX_DSP + 3) // Bit 31 high sets fixed offset mode, using lower 14 bits,
-                                                       // otherwise it is automatic 
-#define U2_REG_DSP_RX_DCOFFSET_Q   _SR_ADDR(SR_RX_DSP + 4) // Bit 31 high sets fixed offset mode, using lower 14 bits
-#define U2_REG_DSP_RX_MUX  _SR_ADDR(SR_RX_DSP + 5)         // called adc_mux in dsp_core_rx.v
+
+  /*!
+   * \brief input mux configuration.
+   *
+   * This determines which ADC (or constant zero) is connected to 
+   * each DDC input.  There are N DDCs (1 now).  Each has two inputs.
+   *
+   * <pre>
+   * Mux value:
+   *
+   *    3                   2                   1                       
+   *  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+   * +-------+-------+-------+-------+-------+-------+-------+-------+
+   * |                                                       |Q0 |I0 |
+   * +-------+-------+-------+-------+-------+-------+-------+-------+
+   *
+   * Each 2-bit I field is either 00 (A/D A), 01 (A/D B) or 1X (const zero)
+   * Each 2-bit Q field is either 00 (A/D A), 01 (A/D B) or 1X (const zero)
+   *
+   * The default value is 0x4
+   * </pre>
+   */
 
 ////////////////////////////////////////////////
 // GPIO, Slave 4
 ////////////////////////////////////////////////
-//
-// These go to the daughterboard i/o pins
-//
-#define U2_REG_GPIO_BASE 0xC800
-
-#define U2_REG_GPIO_IO         U2_REG_GPIO_BASE + 0  // 32 bits, gpio io pins (tx high 16 bits, rx low 16 bits)
-#define U2_REG_GPIO_DDR        U2_REG_GPIO_BASE + 4  // 32 bits, gpio ddr, 1 means output (tx high 16 bits, rx low 16 bits)
-#define U2_REG_GPIO_TX_SEL     U2_REG_GPIO_BASE + 8  // 16 2-bit fields select which source goes to TX DB
-#define U2_REG_GPIO_RX_SEL     U2_REG_GPIO_BASE + 12 // 16 2-bit fields select which source goes to RX DB
 
 // each 2-bit sel field is layed out this way
 #define U2_FLAG_GPIO_SEL_GPIO      0 // if pin is an output, set by GPIO register
@@ -159,42 +251,33 @@
 ///////////////////////////////////////////////////
 // ATR Controller, Slave 11
 ////////////////////////////////////////////////
-#define U2_REG_ATR_BASE  0xE400
 
-#define U2_REG_ATR_IDLE_TXSIDE  U2_REG_ATR_BASE + 0
-#define U2_REG_ATR_IDLE_RXSIDE  U2_REG_ATR_BASE + 2
-#define U2_REG_ATR_INTX_TXSIDE  U2_REG_ATR_BASE + 4
-#define U2_REG_ATR_INTX_RXSIDE  U2_REG_ATR_BASE + 6
-#define U2_REG_ATR_INRX_TXSIDE  U2_REG_ATR_BASE + 8
-#define U2_REG_ATR_INRX_RXSIDE  U2_REG_ATR_BASE + 10
-#define U2_REG_ATR_FULL_TXSIDE  U2_REG_ATR_BASE + 12
-#define U2_REG_ATR_FULL_RXSIDE  U2_REG_ATR_BASE + 14
 
 ///////////////////////////////////////////////////
 // RX CTRL regs
 ///////////////////////////////////////////////////
 // The following 3 are logically a single command register.
 // They are clocked into the underlying fifo when time_ticks is written.
-#define U2_REG_RX_CTRL_STREAM_CMD        _SR_ADDR(SR_RX_CTRL + 0) // {now, chain, num_samples(30)
-#define U2_REG_RX_CTRL_TIME_SECS         _SR_ADDR(SR_RX_CTRL + 1)
-#define U2_REG_RX_CTRL_TIME_TICKS        _SR_ADDR(SR_RX_CTRL + 2)
+//#define U2_REG_RX_CTRL_STREAM_CMD        _SR_ADDR(SR_RX_CTRL + 0) // {now, chain, num_samples(30)
+//#define U2_REG_RX_CTRL_TIME_SECS         _SR_ADDR(SR_RX_CTRL + 1)
+//#define U2_REG_RX_CTRL_TIME_TICKS        _SR_ADDR(SR_RX_CTRL + 2)
 
-#define U2_REG_RX_CTRL_CLEAR_STATE       _SR_ADDR(SR_RX_CTRL + 3)
-#define U2_REG_RX_CTRL_VRT_HEADER        _SR_ADDR(SR_RX_CTRL + 4) // word 0 of packet.  FPGA fills in packet counter
-#define U2_REG_RX_CTRL_VRT_STREAM_ID     _SR_ADDR(SR_RX_CTRL + 5) // word 1 of packet.
-#define U2_REG_RX_CTRL_VRT_TRAILER       _SR_ADDR(SR_RX_CTRL + 6)
-#define U2_REG_RX_CTRL_NSAMPS_PER_PKT    _SR_ADDR(SR_RX_CTRL + 7)
-#define U2_REG_RX_CTRL_NCHANNELS         _SR_ADDR(SR_RX_CTRL + 8) // 1 in basic case, up to 4 for vector sources
+//#define U2_REG_RX_CTRL_CLEAR_STATE       _SR_ADDR(SR_RX_CTRL + 3)
+//#define U2_REG_RX_CTRL_VRT_HEADER        _SR_ADDR(SR_RX_CTRL + 4) // word 0 of packet.  FPGA fills in packet counter
+//#define U2_REG_RX_CTRL_VRT_STREAM_ID     _SR_ADDR(SR_RX_CTRL + 5) // word 1 of packet.
+//#define U2_REG_RX_CTRL_VRT_TRAILER       _SR_ADDR(SR_RX_CTRL + 6)
+//#define U2_REG_RX_CTRL_NSAMPS_PER_PKT    _SR_ADDR(SR_RX_CTRL + 7)
+//#define U2_REG_RX_CTRL_NCHANNELS         _SR_ADDR(SR_RX_CTRL + 8) // 1 in basic case, up to 4 for vector sources
 
 ///////////////////////////////////////////////////
 // TX CTRL regs
 ///////////////////////////////////////////////////
-#define U2_REG_TX_CTRL_NUM_CHAN          _SR_ADDR(SR_TX_CTRL + 0)
-#define U2_REG_TX_CTRL_CLEAR_STATE       _SR_ADDR(SR_TX_CTRL + 1)
-#define U2_REG_TX_CTRL_REPORT_SID        _SR_ADDR(SR_TX_CTRL + 2)
-#define U2_REG_TX_CTRL_POLICY            _SR_ADDR(SR_TX_CTRL + 3)
-#define U2_REG_TX_CTRL_CYCLES_PER_UP     _SR_ADDR(SR_TX_CTRL + 4)
-#define U2_REG_TX_CTRL_PACKETS_PER_UP    _SR_ADDR(SR_TX_CTRL + 5)
+//#define U2_REG_TX_CTRL_NUM_CHAN          _SR_ADDR(SR_TX_CTRL + 0)
+//#define U2_REG_TX_CTRL_CLEAR_STATE       _SR_ADDR(SR_TX_CTRL + 1)
+//#define U2_REG_TX_CTRL_REPORT_SID        _SR_ADDR(SR_TX_CTRL + 2)
+//#define U2_REG_TX_CTRL_POLICY            _SR_ADDR(SR_TX_CTRL + 3)
+//#define U2_REG_TX_CTRL_CYCLES_PER_UP     _SR_ADDR(SR_TX_CTRL + 4)
+//#define U2_REG_TX_CTRL_PACKETS_PER_UP    _SR_ADDR(SR_TX_CTRL + 5)
 
 #define U2_FLAG_TX_CTRL_POLICY_WAIT          (0x1 << 0)
 #define U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET   (0x1 << 1)
diff --git a/host/lib/usrp/wrapper_utils.hpp b/host/lib/usrp/wrapper_utils.hpp
index 6f9fdbfca..a7b5c5da6 100644
--- a/host/lib/usrp/wrapper_utils.hpp
+++ b/host/lib/usrp/wrapper_utils.hpp
@@ -30,7 +30,7 @@ static inline uhd::freq_range_t add_dsp_shift(
     wax::obj dsp
 ){
     double codec_rate = dsp[uhd::usrp::DSP_PROP_CODEC_RATE].as<double>();
-    return uhd::freq_range_t(range.min - codec_rate/2.0, range.max + codec_rate/2.0);
+    return uhd::freq_range_t(range.start() - codec_rate/2.0, range.stop() + codec_rate/2.0);
 }
 
 static inline void do_samp_rate_warning_message(