RFNoC: Fix DSP frequency accuracy

The host code was calculating and programming a 32-bit value for the DSP
frequency, but the DDS modules in the FPGA only use the upper 24-bits.
This led to inaccurate frequency values being returned.  This change
corrects the resolution of the value on the host side so an accurate
value is returned.

Signed-off-by: michael-west <michael.west@ettus.com>

1 files changed, 5 insertions, 4 deletions

diff --git a/host/lib/usrp/cores/dsp_core_utils.cpp b/host/lib/usrp/cores/dsp_core_utils.cpp
index 868e47234..5575d9775 100644
--- a/host/lib/usrp/cores/dsp_core_utils.cpp
+++ b/host/lib/usrp/cores/dsp_core_utils.cpp
@@ -17,7 +17,8 @@ static const int32_t MIN_FREQ_WORD = std::numeric_limits<int32_t>::min();
 void get_freq_and_freq_word(const double requested_freq,
     const double tick_rate,
     double& actual_freq,
-    int32_t& freq_word)
+    int32_t& freq_word,
+    int word_width)
 {
     const double freq = uhd::math::wrap_frequency(requested_freq, tick_rate);
 
@@ -33,7 +34,7 @@ void get_freq_and_freq_word(const double requested_freq,
      */
     freq_word = 0;
 
-    static const double scale_factor = std::pow(2.0, 32);
+    static const double scale_factor = std::pow(2.0, word_width);
     if ((freq / tick_rate) >= (MAX_FREQ_WORD / scale_factor)) {
         /* Operation would have caused a positive overflow of int32. */
         freq_word = MAX_FREQ_WORD;
@@ -51,10 +52,10 @@ void get_freq_and_freq_word(const double requested_freq,
 }
 
 std::tuple<double, int> get_freq_and_freq_word(
-    const double requested_freq, const double tick_rate)
+    const double requested_freq, const double tick_rate, int word_width)
 {
     double actual_freq;
     int32_t freq_word;
-    get_freq_and_freq_word(requested_freq, tick_rate, actual_freq, freq_word);
+    get_freq_and_freq_word(requested_freq, tick_rate, actual_freq, freq_word, word_width);
     return std::make_tuple(actual_freq, freq_word);
 }