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| author | Tom Tsou <tom.tsou@ettus.com> | 2015-06-17 15:38:50 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2015-07-13 14:59:16 -0700 |
| commit | 2b837f2ff7e9836dc4114791308bf2c9a37b807c (patch) | |
| tree | db73864ff543d7825251dbd7a3ba58122c596a06 /host/lib/usrp | |
| parent | f9c8dfbd8db24b64f305f04a2d1b83b84c16aa5f (diff) | |
| download | uhd-2b837f2ff7e9836dc4114791308bf2c9a37b807c.tar.gz uhd-2b837f2ff7e9836dc4114791308bf2c9a37b807c.tar.bz2 uhd-2b837f2ff7e9836dc4114791308bf2c9a37b807c.zip | |
ad9361: Invert phase on Rx LNA bypass path
This patch resolves issue #823
"B200: Receive RF DC calibration makes calibration worse below 34 dB"
According to ADI reference documents, enabling any of the 3 LNA's in the
receive path causes a 180 degree phase shift. Correspondingly, we invert
the LNA bypass path (gain indices below 34 dB) to match. Testing,
however, reveals that one of these statements or the polarity inversion
setting itself is false. Disabling the switch results in expected
behavior and proper phase alignment.
Overall effect is up to 60 dB of DC offset suppression ahead of the Rx
analog LPF. This reduces the problematic dependency on active baseband
tracking and may resolves multiple tracking stability issues.
Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
Diffstat (limited to 'host/lib/usrp')
| -rw-r--r-- | host/lib/usrp/common/ad9361_driver/ad9361_device.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp index 527f7031e..c374780f7 100644 --- a/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp +++ b/host/lib/usrp/common/ad9361_driver/ad9361_device.cpp @@ -1594,7 +1594,6 @@ void ad9361_device_t::initialize() _io_iface->poke8(0x019, 0x00); // AuxDAC2 Word[9:2] _io_iface->poke8(0x01A, 0x00); // AuxDAC1 Config and Word[1:0] _io_iface->poke8(0x01B, 0x00); // AuxDAC2 Config and Word[1:0] - _io_iface->poke8(0x022, 0x4A); // Invert Bypassed LNA _io_iface->poke8(0x023, 0xFF); // AuxDAC Manaul/Auto Control _io_iface->poke8(0x026, 0x00); // AuxDAC Manual Select Bit/GPO Manual Select _io_iface->poke8(0x030, 0x00); // AuxDAC1 Rx Delay @@ -1602,6 +1601,14 @@ void ad9361_device_t::initialize() _io_iface->poke8(0x032, 0x00); // AuxDAC2 Rx Delay _io_iface->poke8(0x033, 0x00); // AuxDAC2 Tx Delay + /* LNA bypass polarity inversion + * According to the register map, we should invert the bypass path to + * match LNA phase. Extensive testing, however, shows otherwise and that + * to align bypass and LNA phases, the bypass inversion switch should be + * turned off. + */ + _io_iface->poke8(0x022, 0x0A); + /* Setup AuxADC */ _io_iface->poke8(0x00B, 0x00); // Temp Sensor Setup (Offset) _io_iface->poke8(0x00C, 0x00); // Temp Sensor Setup (Temp Window) |