aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp/x300
diff options
context:
space:
mode:
authorMartin Braun <martin.braun@ettus.com>2019-06-05 12:05:30 -0700
committerMartin Braun <martin.braun@ettus.com>2019-11-26 11:49:25 -0800
commitbba75b29feed2d3b42f9b6c4eb4bc574c09924c7 (patch)
tree49eb882993e936e80eddc44c39b68fe727b311fc /host/lib/usrp/x300
parentbb7ed79f012faa4c59e4c312dddc46822968e6c4 (diff)
downloaduhd-bba75b29feed2d3b42f9b6c4eb4bc574c09924c7.tar.gz
uhd-bba75b29feed2d3b42f9b6c4eb4bc574c09924c7.tar.bz2
uhd-bba75b29feed2d3b42f9b6c4eb4bc574c09924c7.zip
rfnoc: Add mb_controller base class and X300/MPMD implementations
Diffstat (limited to 'host/lib/usrp/x300')
-rw-r--r--host/lib/usrp/x300/CMakeLists.txt1
-rw-r--r--host/lib/usrp/x300/x300_mb_controller.cpp38
-rw-r--r--host/lib/usrp/x300/x300_mb_controller.hpp79
3 files changed, 118 insertions, 0 deletions
diff --git a/host/lib/usrp/x300/CMakeLists.txt b/host/lib/usrp/x300/CMakeLists.txt
index 062db3f16..a19a6a4e8 100644
--- a/host/lib/usrp/x300/CMakeLists.txt
+++ b/host/lib/usrp/x300/CMakeLists.txt
@@ -27,6 +27,7 @@ if(ENABLE_X300)
${CMAKE_CURRENT_SOURCE_DIR}/x300_dboard_iface.cpp
${CMAKE_CURRENT_SOURCE_DIR}/x300_clock_ctrl.cpp
${CMAKE_CURRENT_SOURCE_DIR}/x300_image_loader.cpp
+ ${CMAKE_CURRENT_SOURCE_DIR}/x300_mb_controller.cpp
${CMAKE_CURRENT_SOURCE_DIR}/x300_mb_eeprom_iface.cpp
${CMAKE_CURRENT_SOURCE_DIR}/x300_mb_eeprom.cpp
${CMAKE_CURRENT_SOURCE_DIR}/x300_mboard_type.hpp
diff --git a/host/lib/usrp/x300/x300_mb_controller.cpp b/host/lib/usrp/x300/x300_mb_controller.cpp
new file mode 100644
index 000000000..9762f486d
--- /dev/null
+++ b/host/lib/usrp/x300/x300_mb_controller.cpp
@@ -0,0 +1,38 @@
+//
+// Copyright 2019 Ettus Research, a National Instruments Brand
+//
+// SPDX-License-Identifier: GPL-3.0-or-later
+//
+
+#include "x300_mb_controller.hpp"
+
+using namespace uhd::rfnoc;
+
+
+uint64_t x300_mb_controller::x300_timekeeper::get_ticks_now()
+{
+ // tbw
+ return 0;
+}
+
+uint64_t x300_mb_controller::x300_timekeeper::get_ticks_last_pps()
+{
+ // tbw
+ return 0;
+}
+
+void x300_mb_controller::x300_timekeeper::set_ticks_now(const uint64_t ticks)
+{
+ // tbw
+}
+
+void x300_mb_controller::x300_timekeeper::set_ticks_next_pps(const uint64_t ticks)
+{
+ // tbw
+}
+
+void x300_mb_controller::x300_timekeeper::set_period(const uint64_t period_ns)
+{
+ // tbw
+}
+
diff --git a/host/lib/usrp/x300/x300_mb_controller.hpp b/host/lib/usrp/x300/x300_mb_controller.hpp
new file mode 100644
index 000000000..9a220ab00
--- /dev/null
+++ b/host/lib/usrp/x300/x300_mb_controller.hpp
@@ -0,0 +1,79 @@
+//
+// Copyright 2019 Ettus Research, a National Instruments Brand
+//
+// SPDX-License-Identifier: GPL-3.0-or-later
+//
+
+#ifndef INCLUDED_LIBUHD_X300_MB_CONTROLLER_HPP
+#define INCLUDED_LIBUHD_X300_MB_CONTROLLER_HPP
+
+#include "x300_clock_ctrl.hpp"
+#include <uhd/rfnoc/mb_controller.hpp>
+#include <uhd/types/wb_iface.hpp>
+
+namespace uhd { namespace rfnoc {
+
+/*! X300-Specific version of the mb_controller
+ *
+ * Reminder: There is one of these per motherboard.
+ */
+class x300_mb_controller : public mb_controller
+{
+public:
+ x300_mb_controller(uhd::i2c_iface::sptr zpu_i2c,
+ uhd::wb_iface::sptr zpu_ctrl,
+ x300_clock_ctrl::sptr clock_ctrl)
+ : _zpu_i2c(zpu_i2c), _zpu_ctrl(zpu_ctrl), _clock_ctrl(clock_ctrl)
+ {
+ // nop
+ }
+
+ //! Return reference to the ZPU-owned I2C controller
+ uhd::i2c_iface::sptr get_zpu_i2c()
+ {
+ return _zpu_i2c;
+ }
+
+ //! Reference to the ZPU peek/poke interface
+ uhd::wb_iface::sptr get_zpu_ctrl() { return _zpu_ctrl; }
+
+ //! Return reference to LMK clock controller
+ x300_clock_ctrl::sptr get_clock_ctrl() { return _clock_ctrl; }
+
+ //! X300-specific version of the timekeeper controls
+ class x300_timekeeper : public mb_controller::timekeeper
+ {
+ public:
+ x300_timekeeper(uhd::wb_iface::sptr zpu_ctrl) : _zpu_ctrl(zpu_ctrl) {}
+
+ uint64_t get_ticks_now();
+
+ uint64_t get_ticks_last_pps();
+
+ void set_ticks_now(const uint64_t ticks);
+
+ void set_ticks_next_pps(const uint64_t ticks);
+
+ void set_period(const uint64_t period_ns);
+
+ private:
+ uhd::wb_iface::sptr _zpu_ctrl;
+ };
+
+private:
+ /**************************************************************************
+ * Attributes
+ *************************************************************************/
+ //! Reference to the ZPU-owned I2C controller
+ uhd::i2c_iface::sptr _zpu_i2c;
+
+ //! Reference to the ZPU peek/poke interface
+ uhd::wb_iface::sptr _zpu_ctrl;
+
+ //! Reference to LMK clock controller
+ x300_clock_ctrl::sptr _clock_ctrl;
+};
+
+}} // namespace uhd::rfnoc
+
+#endif /* INCLUDED_LIBUHD_X300_MB_CONTROLLER_HPP */