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authorMartin Braun <martin.braun@ettus.com>2015-03-31 09:24:21 -0700
committerMartin Braun <martin.braun@ettus.com>2015-03-31 09:24:21 -0700
commit49489a56240ac9593330a3c56b5aefdf8c609a07 (patch)
treebd01f891fdbcde86e564443238ec66e3d91a2bc3 /host/lib/usrp/x300
parent8c20712d611a8ac842984953f9924f30976fe884 (diff)
parentda5311407bdabcb7206f8ffb0b77de32d294f083 (diff)
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Merge branch 'maint'
Conflicts: host/docs/usrp_e3x0.dox
Diffstat (limited to 'host/lib/usrp/x300')
-rw-r--r--host/lib/usrp/x300/x300_clock_ctrl.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/host/lib/usrp/x300/x300_clock_ctrl.cpp b/host/lib/usrp/x300/x300_clock_ctrl.cpp
index 247c10ac4..b59247d53 100644
--- a/host/lib/usrp/x300/x300_clock_ctrl.cpp
+++ b/host/lib/usrp/x300/x300_clock_ctrl.cpp
@@ -190,7 +190,7 @@ void set_master_clock_rate(double clock_rate) {
// PLL1 - 2 MHz compare frequency
_lmk04816_regs.PLL1_N_28 = 100;
_lmk04816_regs.PLL1_R_27 = 5;
- _lmk04816_regs.PLL1_CP_GAIN_27 = lmk04816_regs_t::PLL1_CP_GAIN_27_100UA;
+ _lmk04816_regs.PLL1_CP_GAIN_27 = lmk04816_regs_t::PLL1_CP_GAIN_27_1600UA;
// PLL2 - 96 MHz compare frequency
_lmk04816_regs.PLL2_N_30 = 5;