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author | Ashish Chaudhari <ashish@ettus.com> | 2016-05-25 16:08:12 -0700 |
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committer | Ashish Chaudhari <ashish@ettus.com> | 2016-05-25 16:08:12 -0700 |
commit | bf74b4e85d6d2b8833c35b1f243eb36b99432250 (patch) | |
tree | efb43cd145665cfe7d439c68010103211d48d582 /host/lib/usrp/x300 | |
parent | 984a18a75bd73fecafa9050fbec7e8bf58ac3084 (diff) | |
download | uhd-bf74b4e85d6d2b8833c35b1f243eb36b99432250.tar.gz uhd-bf74b4e85d6d2b8833c35b1f243eb36b99432250.tar.bz2 uhd-bf74b4e85d6d2b8833c35b1f243eb36b99432250.zip |
bugfix#1102: Prevented X300 DAC FIFO from underflowing
- The spectral distortion was begin caused by the DAC FIFO
underflowing. The fix was to run through the DAC sync
procedure which uses the falling edge clock to sample
the RefClk and sync it with the data clk
Diffstat (limited to 'host/lib/usrp/x300')
-rw-r--r-- | host/lib/usrp/x300/x300_adc_dac_utils.cpp | 2 | ||||
-rw-r--r-- | host/lib/usrp/x300/x300_dac_ctrl.cpp | 14 | ||||
-rw-r--r-- | host/lib/usrp/x300/x300_dac_ctrl.hpp | 3 |
3 files changed, 4 insertions, 15 deletions
diff --git a/host/lib/usrp/x300/x300_adc_dac_utils.cpp b/host/lib/usrp/x300/x300_adc_dac_utils.cpp index e08825749..cd337febb 100644 --- a/host/lib/usrp/x300/x300_adc_dac_utils.cpp +++ b/host/lib/usrp/x300/x300_adc_dac_utils.cpp @@ -35,7 +35,7 @@ void x300_impl::synchronize_dacs(const std::vector<radio_perifs_t*>& radios) //Reinitialize and resync all DACs for (size_t i = 0; i < radios.size(); i++) { - radios[i]->dac->reset_and_resync(); + radios[i]->dac->reset(); } //Get a rough estimate of the cumulative command latency diff --git a/host/lib/usrp/x300/x300_dac_ctrl.cpp b/host/lib/usrp/x300/x300_dac_ctrl.cpp index bb41146b6..d49fba383 100644 --- a/host/lib/usrp/x300/x300_dac_ctrl.cpp +++ b/host/lib/usrp/x300/x300_dac_ctrl.cpp @@ -69,21 +69,13 @@ public: //ADI recommendations: //- soft reset the chip before configuration //- put the chip in sleep mode during configuration and wake it up when done - _soft_reset(); - _sleep_mode(true); - _init(); - _sleep_mode(false); - } - - void reset_and_resync() - { - //ADI recommendations: - //- soft reset the chip before configuration - //- put the chip in sleep mode during configuration and wake it up when done //- configure synchronization settings when sleeping _soft_reset(); _sleep_mode(true); _init(); + //We run backend sync regardless of whether we need to sync multiple DACs + //because we use the internal DAC FIFO to meet system synchronous timing + //and we need to guarantee that the FIFO is not empty. _backend_sync(); _sleep_mode(false); } diff --git a/host/lib/usrp/x300/x300_dac_ctrl.hpp b/host/lib/usrp/x300/x300_dac_ctrl.hpp index c2e509b54..f2a407971 100644 --- a/host/lib/usrp/x300/x300_dac_ctrl.hpp +++ b/host/lib/usrp/x300/x300_dac_ctrl.hpp @@ -40,9 +40,6 @@ public: // ! Reset the DAC virtual void reset(void) = 0; - // ! Reset the DAC and resync - virtual void reset_and_resync(void) = 0; - // ! Check for successful backend and frontend sync virtual void verify_sync(void) = 0; }; |