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authorAshish Chaudhari <ashish@ettus.com>2015-09-16 17:21:07 -0700
committerAshish Chaudhari <ashish@ettus.com>2015-09-16 17:21:53 -0700
commit40e71c80c649819e017702591dba3d79903a5136 (patch)
tree1eafcf209016c186f7b09f4b94e43f892b9a1d22 /host/lib/usrp/x300
parentde907d20e6f6f5b0fb6f3876126abdfcecc2fc67 (diff)
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x300: Made DRAM FIFO size software configurable
Diffstat (limited to 'host/lib/usrp/x300')
-rw-r--r--host/lib/usrp/x300/x300_impl.cpp2
-rw-r--r--host/lib/usrp/x300/x300_impl.hpp1
2 files changed, 3 insertions, 0 deletions
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp
index cb13cdbb8..c73e26f3d 100644
--- a/host/lib/usrp/x300/x300_impl.cpp
+++ b/host/lib/usrp/x300/x300_impl.cpp
@@ -753,6 +753,8 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr)
mb.zpu_ctrl,
SR_ADDR(SET0_BASE, ZPU_SR_DRAM_FIFO0+(i*NUM_REGS)),
SR_ADDR(SET0_BASE, ZPU_RB_DRAM_FIFO0+i));
+ mb.dram_buff_ctrl[i]->resize(X300_DRAM_FIFO_SIZE * i, X300_DRAM_FIFO_SIZE);
+
if (mb.dram_buff_ctrl[i]->ext_bist_supported()) {
UHD_MSG(status) << boost::format("Running BIST for DRAM FIFO %d... ") % i;
boost::uint32_t bisterr = mb.dram_buff_ctrl[i]->run_bist();
diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp
index a71540e8b..683c1cb32 100644
--- a/host/lib/usrp/x300/x300_impl.hpp
+++ b/host/lib/usrp/x300/x300_impl.hpp
@@ -61,6 +61,7 @@ static const size_t X300_TX_HW_BUFF_SIZE_SRAM = 520*1024; //512K SRAM
static const size_t X300_TX_FC_RESPONSE_FREQ_SRAM = 8; //per flow-control window
static const size_t X300_TX_HW_BUFF_SIZE_DRAM = 128*1024;
static const size_t X300_TX_FC_RESPONSE_FREQ_DRAM = 32;
+static const boost::uint32_t X300_DRAM_FIFO_SIZE = 32*1024*1024;
static const size_t X300_RX_SW_BUFF_SIZE_ETH = 0x2000000;//32MiB For an ~8k frame size any size >32MiB is just wasted buffer space
static const size_t X300_RX_SW_BUFF_SIZE_ETH_MACOS = 0x100000; //1Mib