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authorBen Hilburn <ben.hilburn@ettus.com>2014-02-14 12:05:07 -0800
committerBen Hilburn <ben.hilburn@ettus.com>2014-02-14 12:05:07 -0800
commitff1546f8137f7f92bb250f685561b0c34cc0e053 (patch)
tree7fa6fd05c8828df256a1b20e2935bd3ba9899e2c /host/lib/usrp/x300/x300_impl.hpp
parent4f691d88123784c2b405816925f1a1aef69d18c1 (diff)
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Pushing the bulk of UHD-3.7.0 code.
Diffstat (limited to 'host/lib/usrp/x300/x300_impl.hpp')
-rw-r--r--host/lib/usrp/x300/x300_impl.hpp51
1 files changed, 31 insertions, 20 deletions
diff --git a/host/lib/usrp/x300/x300_impl.hpp b/host/lib/usrp/x300/x300_impl.hpp
index 37f8cc468..1fb3676a0 100644
--- a/host/lib/usrp/x300/x300_impl.hpp
+++ b/host/lib/usrp/x300/x300_impl.hpp
@@ -58,21 +58,23 @@ static const double X300_BUS_CLOCK_RATE = 175e6; //Hz
static const size_t X300_TX_HW_BUFF_SIZE = 0x90000; //576KiB
static const size_t X300_TX_FC_RESPONSE_FREQ = 8; //per flow-control window
-static const size_t X300_RX_SW_BUFF_SIZE_ETH = 0x2000000; //32MiB For an ~8k MTU any size >32MiB is just wasted buffer space
-static const size_t X300_RX_SW_BUFF_SIZE_ETH_MACOS = 0x100000; //1Mib
-static const double X300_RX_SW_BUFF_FULL_FACTOR = 0.90; //Buffer should ideally be 90% full.
-static const size_t X300_RX_FC_REQUEST_FREQ = 32; //per flow-control window
-
-static const size_t X300_PCIE_DATA_FRAME_SIZE = 8192; //bytes
-static const size_t X300_PCIE_DATA_NUM_FRAMES = 2048;
-static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes
-static const size_t X300_PCIE_MSG_NUM_FRAMES = 32;
-
-static const size_t X300_ETH_DATA_FRAME_SIZE = 8000; //bytes
-static const size_t X300_ETH_DATA_NUM_FRAMES = 32;
-static const size_t X300_ETH_MSG_FRAME_SIZE = uhd::transport::udp_simple::mtu; //bytes
-static const size_t X300_ETH_MSG_NUM_FRAMES = 32;
-static const double X300_DEFAULT_SYSREF_RATE = 10e6;
+static const size_t X300_RX_SW_BUFF_SIZE_ETH = 0x2000000;//32MiB For an ~8k frame size any size >32MiB is just wasted buffer space
+static const size_t X300_RX_SW_BUFF_SIZE_ETH_MACOS = 0x100000; //1Mib
+static const double X300_RX_SW_BUFF_FULL_FACTOR = 0.90; //Buffer should ideally be 90% full.
+static const size_t X300_RX_FC_REQUEST_FREQ = 32; //per flow-control window
+
+static const size_t X300_PCIE_DATA_FRAME_SIZE = 8192; //bytes
+static const size_t X300_PCIE_DATA_NUM_FRAMES = 2048;
+static const size_t X300_PCIE_MSG_FRAME_SIZE = 256; //bytes
+static const size_t X300_PCIE_MSG_NUM_FRAMES = 32;
+
+static const size_t X300_10GE_DATA_FRAME_MAX_SIZE = 8000; //bytes
+static const size_t X300_1GE_DATA_FRAME_MAX_SIZE = 1472; //bytes
+static const size_t X300_ETH_MSG_FRAME_SIZE = uhd::transport::udp_simple::mtu; //bytes
+
+static const size_t X300_ETH_MSG_NUM_FRAMES = 32;
+static const size_t X300_ETH_DATA_NUM_FRAMES = 32;
+static const double X300_DEFAULT_SYSREF_RATE = 10e6;
#define X300_RADIO_DEST_PREFIX_TX 0
#define X300_RADIO_DEST_PREFIX_CTRL 1
@@ -207,6 +209,9 @@ private:
int clock_control_regs__pps_out_enb;
int clock_control_regs__tcxo_enb;
int clock_control_regs__gpsdo_pwr;
+
+ //which FPGA image is loaded
+ std::string loaded_fpga_image;
};
std::vector<mboard_members_t> _mb;
@@ -243,13 +248,19 @@ private:
const uhd::device_addr_t& args,
boost::uint32_t& sid);
- struct mtu_result_t
+ struct frame_size_t
{
- size_t recv_mtu;
- size_t send_mtu;
+ size_t recv_frame_size;
+ size_t send_frame_size;
};
-
- mtu_result_t determine_mtu(const std::string &addr, const mtu_result_t &user_mtu);
+ frame_size_t max_frame_sizes;
+
+ /*!
+ * Automatically determine the maximum frame size available by sending a UDP packet
+ * to the device and see which packet sizes actually work. This way, we can take
+ * switches etc. into account which might live between the device and the host.
+ */
+ frame_size_t determine_max_frame_size(const std::string &addr, const frame_size_t &user_mtu);
////////////////////////////////////////////////////////////////////
//