usrp-e100: created device address arg for master clock rate, removed eeprom hack

4 files changed, 12 insertions, 25 deletions

diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.cpp b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
index 968c2ea04..49ce0c742 100644
--- a/host/lib/usrp/usrp_e100/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp_e100/clock_ctrl.cpp
@@ -37,7 +37,6 @@ using namespace uhd;
  **********************************************************************/
 static const bool ENABLE_THE_TEST_OUT = true;
 static const double REFERENCE_INPUT_RATE = 10e6;
-static const double DEFAULT_OUTPUT_RATE = 64e6;
 
 /***********************************************************************
  * Helpers
@@ -168,7 +167,7 @@ static clock_settings_type get_clock_settings(double rate){
  **********************************************************************/
 class usrp_e100_clock_ctrl_impl : public usrp_e100_clock_ctrl{
 public:
-    usrp_e100_clock_ctrl_impl(usrp_e100_iface::sptr iface){
+    usrp_e100_clock_ctrl_impl(usrp_e100_iface::sptr iface, double master_clock_rate){
         _iface = iface;
         _chan_rate = 0.0;
         _out_rate = 0.0;
@@ -185,24 +184,9 @@ public:
 
         this->use_internal_ref();
 
-        //initialize the FPGA clock to something
-        bool fpga_clock_initialized = false;
-        try{
-            if (not _iface->mb_eeprom["mcr"].empty()){
-                UHD_MSG(status) << "Read FPGA clock rate from EEPROM setting." << std::endl;
-                const double master_clock_rate = boost::lexical_cast<double>(_iface->mb_eeprom["mcr"]);
-                UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl;
-                this->set_fpga_clock_rate(master_clock_rate);
-                fpga_clock_initialized = true;
-            }
-        }
-        catch(const std::exception &e){
-            UHD_MSG(error) << "Error setting FPGA clock rate from EEPROM: " << e.what() << std::endl;
-        }
-        if (not fpga_clock_initialized){ //was not set... use the default rate
-            UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (DEFAULT_OUTPUT_RATE/1e6) << std::endl;
-            this->set_fpga_clock_rate(DEFAULT_OUTPUT_RATE);
-        }
+        //initialize the FPGA clock rate
+        UHD_MSG(status) << boost::format("Initializing FPGA clock to %fMHz...") % (master_clock_rate/1e6) << std::endl;
+        this->set_fpga_clock_rate(master_clock_rate);
 
         this->enable_test_clock(ENABLE_THE_TEST_OUT);
         this->enable_rx_dboard_clock(false);
@@ -518,6 +502,6 @@ private:
 /***********************************************************************
  * Clock Control Make
  **********************************************************************/
-usrp_e100_clock_ctrl::sptr usrp_e100_clock_ctrl::make(usrp_e100_iface::sptr iface){
-    return sptr(new usrp_e100_clock_ctrl_impl(iface));
+usrp_e100_clock_ctrl::sptr usrp_e100_clock_ctrl::make(usrp_e100_iface::sptr iface, double master_clock_rate){
+    return sptr(new usrp_e100_clock_ctrl_impl(iface, master_clock_rate));
 }
diff --git a/host/lib/usrp/usrp_e100/clock_ctrl.hpp b/host/lib/usrp/usrp_e100/clock_ctrl.hpp
index 507f914f3..6f16bc6ed 100644
--- a/host/lib/usrp/usrp_e100/clock_ctrl.hpp
+++ b/host/lib/usrp/usrp_e100/clock_ctrl.hpp
@@ -35,9 +35,10 @@ public:
     /*!
      * Make a new clock control object.
      * \param iface the usrp_e100 iface object
+     * \param master clock rate the FPGA rate
      * \return the clock control object
      */
-    static sptr make(usrp_e100_iface::sptr iface);
+    static sptr make(usrp_e100_iface::sptr iface, double master_clock_rate);
 
     /*!
      * Set the rate of the fpga clock line.
diff --git a/host/lib/usrp/usrp_e100/mboard_impl.cpp b/host/lib/usrp/usrp_e100/mboard_impl.cpp
index d31662eb5..b2533e7ee 100644
--- a/host/lib/usrp/usrp_e100/mboard_impl.cpp
+++ b/host/lib/usrp/usrp_e100/mboard_impl.cpp
@@ -209,7 +209,8 @@ void usrp_e100_impl::mboard_set(const wax::obj &key, const wax::obj &val){
     case MBOARD_PROP_CLOCK_RATE:
         UHD_MSG(warning)
             << "I see that you are setting the master clock rate from the API.\n"
-            << "You may find it more convenient to burn this setting into the EEPROM.\n"
+            << "You may want to pass this into the device address as mcr=<rate>.\n"
+            << "This way, the clock rate is guaranteed to be initialized first.\n"
             << "See the application notes for USRP-E1XX for further instructions.\n"
         ;
         _clock_ctrl->set_fpga_clock_rate(val.as<double>());
diff --git a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
index 4247746ab..5fba0c153 100644
--- a/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
+++ b/host/lib/usrp/usrp_e100/usrp_e100_impl.cpp
@@ -156,7 +156,8 @@ usrp_e100_impl::usrp_e100_impl(
 {
 
     //setup interfaces into hardware
-    _clock_ctrl = usrp_e100_clock_ctrl::make(_iface);
+    const double master_clock_rate = device_addr.cast<double>("master_clock_rate", 64e6);
+    _clock_ctrl = usrp_e100_clock_ctrl::make(_iface, master_clock_rate);
     _codec_ctrl = usrp_e100_codec_ctrl::make(_iface);
 
     //initialize the mboard