Merge branch 'usrp_e_mmap_b2' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e

7 files changed, 144 insertions, 115 deletions

diff --git a/host/lib/usrp/usrp2/clock_ctrl.cpp b/host/lib/usrp/usrp2/clock_ctrl.cpp
index 02227afad..1e1c9b7b8 100644
--- a/host/lib/usrp/usrp2/clock_ctrl.cpp
+++ b/host/lib/usrp/usrp2/clock_ctrl.cpp
@@ -20,6 +20,7 @@
 #include "usrp2_regs.hpp" //spi slave constants
 #include <uhd/utils/assert.hpp>
 #include <boost/cstdint.hpp>
+#include <iostream>
 
 using namespace uhd;
 
@@ -67,12 +68,60 @@ public:
         this->enable_dac_clock(true);
         this->enable_adc_clock(true);
 
+        /* always driving the mimo reference */
+        this->enable_mimo_clock_out(true);
     }
 
     ~usrp2_clock_ctrl_impl(void){
-        /* private clock enables, must be set here */
+        //power down clock outputs
+        this->enable_external_ref(false);
+        this->enable_rx_dboard_clock(false);
+        this->enable_tx_dboard_clock(false);
         this->enable_dac_clock(false);
         this->enable_adc_clock(false);
+        this->enable_mimo_clock_out(false);
+    }
+
+    void enable_mimo_clock_out(bool enb){
+        //FIXME TODO put this revision read in a common place
+        boost::uint8_t rev_hi = _iface->read_eeprom(USRP2_I2C_ADDR_MBOARD, USRP2_EE_MBOARD_REV_MSB, 1).at(0);
+
+        //calculate the low and high dividers
+        size_t divider = size_t(this->get_master_clock_rate()/10e6);
+        size_t high = divider/2;
+        size_t low = divider - high;
+
+        switch(rev_hi){
+        case 3: //clock 2
+            _ad9510_regs.power_down_lvpecl_out2 = enb?
+                ad9510_regs_t::POWER_DOWN_LVPECL_OUT2_NORMAL :
+                ad9510_regs_t::POWER_DOWN_LVPECL_OUT2_SAFE_PD;
+            _ad9510_regs.output_level_lvpecl_out2 = ad9510_regs_t::OUTPUT_LEVEL_LVPECL_OUT2_810MV;
+            //set the registers (divider - 1)
+            _ad9510_regs.divider_low_cycles_out2 = low - 1;
+            _ad9510_regs.divider_high_cycles_out2 = high - 1;
+            _ad9510_regs.bypass_divider_out2 = 0;
+            this->write_reg(0x3e);
+            this->write_reg(0x4c);
+            break;
+
+        case 4: //clock 5
+            _ad9510_regs.power_down_lvds_cmos_out5 = enb? 0 : 1;
+            _ad9510_regs.lvds_cmos_select_out5 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT5_LVDS;
+            _ad9510_regs.output_level_lvds_out5 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT5_1_75MA;
+            //set the registers (divider - 1)
+            _ad9510_regs.divider_low_cycles_out5 = low - 1;
+            _ad9510_regs.divider_high_cycles_out5 = high - 1;
+            _ad9510_regs.bypass_divider_out5 = 0;
+            this->write_reg(0x41);
+            this->write_reg(0x52);
+            break;
+
+        //TODO FIXME do i want to throw, what about uninitialized boards?
+        //default: throw std::runtime_error("unknown rev hi in mboard eeprom");
+        default: std::cerr << "unknown rev hi: " << rev_hi << std::endl;
+        }
+        this->update_regs();
     }
 
     //uses output clock 7 (cmos)
diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp
index f6d2b718a..fdfbf0d17 100644
--- a/host/lib/usrp/usrp2/dboard_iface.cpp
+++ b/host/lib/usrp/usrp2/dboard_iface.cpp
@@ -61,6 +61,7 @@ public:
     double get_clock_rate(unit_t);
     std::vector<double> get_clock_rates(unit_t);
     void set_clock_enabled(unit_t, bool);
+    double get_codec_rate(unit_t);
 
     void write_spi(
         unit_t unit,
@@ -158,6 +159,9 @@ void usrp2_dboard_iface::set_clock_enabled(unit_t unit, bool enb){
     }
 }
 
+double usrp2_dboard_iface::get_codec_rate(unit_t){
+    return _clock_ctrl->get_master_clock_rate();
+}
 /***********************************************************************
  * GPIO
  **********************************************************************/
diff --git a/host/lib/usrp/usrp2/dsp_impl.cpp b/host/lib/usrp/usrp2/dsp_impl.cpp
index 6422142ce..0c85e643f 100644
--- a/host/lib/usrp/usrp2/dsp_impl.cpp
+++ b/host/lib/usrp/usrp2/dsp_impl.cpp
@@ -56,7 +56,9 @@ void usrp2_mboard_impl::init_ddc_config(void){
 /***********************************************************************
  * DDC Properties
  **********************************************************************/
-void usrp2_mboard_impl::ddc_get(const wax::obj &key, wax::obj &val){
+void usrp2_mboard_impl::ddc_get(const wax::obj &key_, wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
+
     switch(key.as<dsp_prop_t>()){
     case DSP_PROP_NAME:
         val = std::string("usrp2 ddc0");
@@ -70,6 +72,10 @@ void usrp2_mboard_impl::ddc_get(const wax::obj &key, wax::obj &val){
         val = _ddc_freq;
         return;
 
+    case DSP_PROP_FREQ_SHIFT_NAMES:
+        val = prop_names_t(1, "");
+        return;
+
     case DSP_PROP_CODEC_RATE:
         val = get_master_clock_freq();
         return;
@@ -82,7 +88,9 @@ void usrp2_mboard_impl::ddc_get(const wax::obj &key, wax::obj &val){
     }
 }
 
-void usrp2_mboard_impl::ddc_set(const wax::obj &key, const wax::obj &val){
+void usrp2_mboard_impl::ddc_set(const wax::obj &key_, const wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
+
     switch(key.as<dsp_prop_t>()){
 
     case DSP_PROP_FREQ_SHIFT:{
@@ -131,7 +139,9 @@ void usrp2_mboard_impl::init_duc_config(void){
 /***********************************************************************
  * DUC Properties
  **********************************************************************/
-void usrp2_mboard_impl::duc_get(const wax::obj &key, wax::obj &val){
+void usrp2_mboard_impl::duc_get(const wax::obj &key_, wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
+
     switch(key.as<dsp_prop_t>()){
     case DSP_PROP_NAME:
         val = std::string("usrp2 duc0");
@@ -145,6 +155,10 @@ void usrp2_mboard_impl::duc_get(const wax::obj &key, wax::obj &val){
         val = _duc_freq;
         return;
 
+    case DSP_PROP_FREQ_SHIFT_NAMES:
+        val = prop_names_t(1, "");
+        return;
+
     case DSP_PROP_CODEC_RATE:
         val = get_master_clock_freq();
         return;
@@ -157,7 +171,9 @@ void usrp2_mboard_impl::duc_get(const wax::obj &key, wax::obj &val){
     }
 }
 
-void usrp2_mboard_impl::duc_set(const wax::obj &key, const wax::obj &val){
+void usrp2_mboard_impl::duc_set(const wax::obj &key_, const wax::obj &val){
+    named_prop_t key = named_prop_t::extract(key_);
+
     switch(key.as<dsp_prop_t>()){
 
     case DSP_PROP_FREQ_SHIFT:{
diff --git a/host/lib/usrp/usrp2/io_impl.cpp b/host/lib/usrp/usrp2/io_impl.cpp
index 4e883cf81..bbe9c273f 100644
--- a/host/lib/usrp/usrp2/io_impl.cpp
+++ b/host/lib/usrp/usrp2/io_impl.cpp
@@ -46,7 +46,7 @@ struct usrp2_impl::io_impl{
 
     io_impl(size_t num_frames, size_t width):
         packet_handler_recv_state(width),
-        recv_pirate_booty(alignment_buffer_type::make(num_frames, width)),
+        recv_pirate_booty(alignment_buffer_type::make(num_frames-3, width)),
         async_msg_fifo(bounded_buffer<async_metadata_t>::make(100/*messages deep*/))
     {
         /* NOP */
@@ -58,9 +58,9 @@ struct usrp2_impl::io_impl{
         recv_pirate_crew.join_all();
     }
 
-    bool get_recv_buffs(vrt_packet_handler::managed_recv_buffs_t &buffs, size_t timeout_ms){
+    bool get_recv_buffs(vrt_packet_handler::managed_recv_buffs_t &buffs, double timeout){
         boost::this_thread::disable_interruption di; //disable because the wait can throw
-        return recv_pirate_booty->pop_elems_with_timed_wait(buffs, boost::posix_time::milliseconds(timeout_ms));
+        return recv_pirate_booty->pop_elems_with_timed_wait(buffs, timeout);
     }
 
     //state management for the vrt packet handler code
@@ -150,7 +150,7 @@ void usrp2_impl::io_init(void){
         std::memcpy(send_buff->cast<void*>(), &data, sizeof(data));
         send_buff->commit(sizeof(data));
         //drain the recv buffers (may have junk)
-        while (data_transport->get_recv_buff().get());
+        while (data_transport->get_recv_buff().get()){};
     }
 
     //the number of recv frames is the number for the first transport
@@ -168,51 +168,57 @@ void usrp2_impl::io_init(void){
             _mboards.at(i), i
         ));
     }
-
-    std::cout << "RX samples per packet: " << get_max_recv_samps_per_packet() << std::endl;
-    std::cout << "TX samples per packet: " << get_max_send_samps_per_packet() << std::endl;
-    std::cout << "Recv pirate num frames: " << num_frames << std::endl;
 }
 
 /***********************************************************************
  * Async Data
  **********************************************************************/
 bool usrp2_impl::recv_async_msg(
-    async_metadata_t &async_metadata, size_t timeout_ms
+    async_metadata_t &async_metadata, double timeout
 ){
     boost::this_thread::disable_interruption di; //disable because the wait can throw
-    return _io_impl->async_msg_fifo->pop_with_timed_wait(
-        async_metadata, boost::posix_time::milliseconds(timeout_ms)
-    );
+    return _io_impl->async_msg_fifo->pop_with_timed_wait(async_metadata, timeout);
 }
 
 /***********************************************************************
  * Send Data
  **********************************************************************/
-bool get_send_buffs(
+static bool get_send_buffs(
     const std::vector<udp_zero_copy::sptr> &trans,
-    vrt_packet_handler::managed_send_buffs_t &buffs
+    vrt_packet_handler::managed_send_buffs_t &buffs,
+    double timeout
 ){
     UHD_ASSERT_THROW(trans.size() == buffs.size());
+    bool good = true;
     for (size_t i = 0; i < buffs.size(); i++){
-        buffs[i] = trans[i]->get_send_buff();
+        buffs[i] = trans[i]->get_send_buff(timeout);
+        good = good and (buffs[i].get() != NULL);
     }
-    return true;
+    return good;
+}
+
+size_t usrp2_impl::get_max_send_samps_per_packet(void) const{
+    static const size_t hdr_size = 0
+        + vrt::max_if_hdr_words32*sizeof(boost::uint32_t)
+        - sizeof(vrt::if_packet_info_t().cid) //no class id ever used
+    ;
+    const size_t bpp = _data_transports.front()->get_send_frame_size() - hdr_size;
+    return bpp/_tx_otw_type.get_sample_size();
 }
 
 size_t usrp2_impl::send(
     const std::vector<const void *> &buffs, size_t num_samps,
     const tx_metadata_t &metadata, const io_type_t &io_type,
-    send_mode_t send_mode
+    send_mode_t send_mode, double timeout
 ){
     return vrt_packet_handler::send(
         _io_impl->packet_handler_send_state,       //last state of the send handler
         buffs, num_samps,                          //buffer to fill
         metadata, send_mode,                       //samples metadata
-        io_type, _io_helper.get_tx_otw_type(),     //input and output types to convert
+        io_type, _tx_otw_type,                     //input and output types to convert
         _mboards.front()->get_master_clock_freq(), //master clock tick rate
         uhd::transport::vrt::if_hdr_pack_be,
-        boost::bind(&get_send_buffs, _data_transports, _1),
+        boost::bind(&get_send_buffs, _data_transports, _1, timeout),
         get_max_send_samps_per_packet()
     );
 }
@@ -220,18 +226,28 @@ size_t usrp2_impl::send(
 /***********************************************************************
  * Receive Data
  **********************************************************************/
+size_t usrp2_impl::get_max_recv_samps_per_packet(void) const{
+    static const size_t hdr_size = 0
+        + vrt::max_if_hdr_words32*sizeof(boost::uint32_t)
+        + sizeof(vrt::if_packet_info_t().tlr) //forced to have trailer
+        - sizeof(vrt::if_packet_info_t().cid) //no class id ever used
+    ;
+    const size_t bpp = _data_transports.front()->get_recv_frame_size() - hdr_size;
+    return bpp/_rx_otw_type.get_sample_size();
+}
+
 size_t usrp2_impl::recv(
     const std::vector<void *> &buffs, size_t num_samps,
     rx_metadata_t &metadata, const io_type_t &io_type,
-    recv_mode_t recv_mode, size_t timeout_ms
+    recv_mode_t recv_mode, double timeout
 ){
     return vrt_packet_handler::recv(
         _io_impl->packet_handler_recv_state,       //last state of the recv handler
         buffs, num_samps,                          //buffer to fill
         metadata, recv_mode,                       //samples metadata
-        io_type, _io_helper.get_rx_otw_type(),     //input and output types to convert
+        io_type, _rx_otw_type,                     //input and output types to convert
         _mboards.front()->get_master_clock_freq(), //master clock tick rate
         uhd::transport::vrt::if_hdr_unpack_be,
-        boost::bind(&usrp2_impl::io_impl::get_recv_buffs, _io_impl.get(), _1, timeout_ms)
+        boost::bind(&usrp2_impl::io_impl::get_recv_buffs, _io_impl.get(), _1, timeout)
     );
 }
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 0b9f8ee83..a0e6adfad 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -38,10 +38,10 @@ using namespace uhd::usrp;
 usrp2_mboard_impl::usrp2_mboard_impl(
     size_t index,
     transport::udp_simple::sptr ctrl_transport,
-    const usrp2_io_helper &io_helper
+    size_t recv_frame_size
 ):
     _index(index),
-    _io_helper(io_helper)
+    _recv_frame_size(recv_frame_size)
 {
     //make a new interface for usrp2 stuff
     _iface = usrp2_iface::make(ctrl_transport);
@@ -75,7 +75,7 @@ usrp2_mboard_impl::usrp2_mboard_impl(
     this->issue_ddc_stream_cmd(stream_cmd_t::STREAM_MODE_STOP_CONTINUOUS);
 
     //init the rx control registers
-    _iface->poke32(U2_REG_RX_CTRL_NSAMPS_PER_PKT, _io_helper.get_max_recv_samps_per_packet());
+    _iface->poke32(U2_REG_RX_CTRL_NSAMPS_PER_PKT, _recv_frame_size);
     _iface->poke32(U2_REG_RX_CTRL_NCHANNELS, 1);
     _iface->poke32(U2_REG_RX_CTRL_CLEAR_OVERRUN, 1); //reset
     _iface->poke32(U2_REG_RX_CTRL_VRT_HEADER, 0
@@ -178,7 +178,7 @@ void usrp2_mboard_impl::set_time_spec(const time_spec_t &time_spec, bool now){
 
 void usrp2_mboard_impl::issue_ddc_stream_cmd(const stream_cmd_t &stream_cmd){
     _iface->poke32(U2_REG_RX_CTRL_STREAM_CMD, dsp_type1::calc_stream_cmd_word(
-        stream_cmd, _io_helper.get_max_recv_samps_per_packet()
+        stream_cmd, _recv_frame_size
     ));
     _iface->poke32(U2_REG_RX_CTRL_TIME_SECS,  boost::uint32_t(stream_cmd.time_spec.get_full_secs()));
     _iface->poke32(U2_REG_RX_CTRL_TIME_TICKS, stream_cmd.time_spec.get_tick_count(get_master_clock_freq()));
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 568c87a22..a680708ad 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -124,26 +124,7 @@ static uhd::device_addrs_t usrp2_find(const device_addr_t &hint){
 /***********************************************************************
  * Make
  **********************************************************************/
-template <typename out_type, typename in_type>
-out_type lexical_cast(const in_type &in){
-    try{
-        return boost::lexical_cast<out_type>(in);
-    }catch(...){
-        throw std::runtime_error(str(boost::format(
-            "failed to cast \"%s\" to type \"%s\""
-        ) % boost::lexical_cast<std::string>(in) % typeid(out_type).name()));
-    }
-}
-
 static device::sptr usrp2_make(const device_addr_t &device_addr){
-    //extract the receive and send buffer sizes
-    size_t recv_buff_size = 0, send_buff_size= 0 ;
-    if (device_addr.has_key("recv_buff_size")){
-        recv_buff_size = size_t(lexical_cast<double>(device_addr["recv_buff_size"]));
-    }
-    if (device_addr.has_key("send_buff_size")){
-        send_buff_size = size_t(lexical_cast<double>(device_addr["send_buff_size"]));
-    }
 
     //create a ctrl and data transport for each address
     std::vector<udp_simple::sptr> ctrl_transports;
@@ -154,8 +135,7 @@ static device::sptr usrp2_make(const device_addr_t &device_addr){
             addr, num2str(USRP2_UDP_CTRL_PORT)
         ));
         data_transports.push_back(udp_zero_copy::make(
-            addr, num2str(USRP2_UDP_DATA_PORT),
-            recv_buff_size, send_buff_size
+            addr, num2str(USRP2_UDP_DATA_PORT), device_addr
         ));
     }
 
@@ -178,11 +158,23 @@ usrp2_impl::usrp2_impl(
 ):
     _data_transports(data_transports)
 {
+    //setup rx otw type
+    _rx_otw_type.width = 16;
+    _rx_otw_type.shift = 0;
+    _rx_otw_type.byteorder = uhd::otw_type_t::BO_BIG_ENDIAN;
+
+    //setup tx otw type
+    _tx_otw_type.width = 16;
+    _tx_otw_type.shift = 0;
+    _tx_otw_type.byteorder = uhd::otw_type_t::BO_BIG_ENDIAN;
+
+    //!!!!! set the otw type here before continuing, its used below
+
     //create a new mboard handler for each control transport
     for(size_t i = 0; i < ctrl_transports.size(); i++){
-        _mboards.push_back(usrp2_mboard_impl::sptr(
-            new usrp2_mboard_impl(i, ctrl_transports[i], _io_helper)
-        ));
+        _mboards.push_back(usrp2_mboard_impl::sptr(new usrp2_mboard_impl(
+            i, ctrl_transports[i], this->get_max_recv_samps_per_packet()
+        )));
         //use an empty name when there is only one mboard
         std::string name = (ctrl_transports.size() > 1)? boost::lexical_cast<std::string>(i) : "";
         _mboard_dict[name] = _mboards.back();
diff --git a/host/lib/usrp/usrp2/usrp2_impl.hpp b/host/lib/usrp/usrp2/usrp2_impl.hpp
index 157d17057..558726a2b 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.hpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.hpp
@@ -72,54 +72,6 @@ private:
 };
 
 /*!
- * The io helper class encapculates the max packet sizes and otw types.
- * The otw types are read-only for now, this will be reimplemented
- * when it becomes possible to change the otw type in the usrp2.
- */
-class usrp2_io_helper{
-public:
-    usrp2_io_helper(void){
-        //setup rx otw type
-        _rx_otw_type.width = 16;
-        _rx_otw_type.shift = 0;
-        _rx_otw_type.byteorder = uhd::otw_type_t::BO_BIG_ENDIAN;
-
-        //setup tx otw type
-        _tx_otw_type.width = 16;
-        _tx_otw_type.shift = 0;
-        _tx_otw_type.byteorder = uhd::otw_type_t::BO_BIG_ENDIAN;
-    }
-
-    inline size_t get_max_send_samps_per_packet(void) const{
-        return _max_tx_bytes_per_packet/_tx_otw_type.get_sample_size();
-    }
-
-    inline size_t get_max_recv_samps_per_packet(void) const{
-        return _max_rx_bytes_per_packet/_rx_otw_type.get_sample_size();
-    }
-
-    inline const uhd::otw_type_t &get_rx_otw_type(void) const{
-        return _rx_otw_type;
-    }
-
-    inline const uhd::otw_type_t &get_tx_otw_type(void) const{
-        return _tx_otw_type;
-    }
-
-private:
-    uhd::otw_type_t _rx_otw_type, _tx_otw_type;
-    static const size_t _max_rx_bytes_per_packet = uhd::transport::udp_simple::mtu
-        - uhd::transport::vrt::max_if_hdr_words32*sizeof(boost::uint32_t)
-        - sizeof(uhd::transport::vrt::if_packet_info_t().tlr) //forced to have trailer
-        + sizeof(uhd::transport::vrt::if_packet_info_t().cid) //no class id ever used
-    ;
-    static const size_t _max_tx_bytes_per_packet = uhd::transport::udp_simple::mtu
-        - uhd::transport::vrt::max_if_hdr_words32*sizeof(boost::uint32_t)
-        + sizeof(uhd::transport::vrt::if_packet_info_t().cid) //no class id ever used
-    ;
-};
-
-/*!
  * USRP2 mboard implementation guts:
  * The implementation details are encapsulated here.
  * Handles properties on the mboard, dboard, dsps...
@@ -129,7 +81,11 @@ public:
     typedef boost::shared_ptr<usrp2_mboard_impl> sptr;
 
     //structors
-    usrp2_mboard_impl(size_t index, uhd::transport::udp_simple::sptr, const usrp2_io_helper &);
+    usrp2_mboard_impl(
+        size_t index,
+        uhd::transport::udp_simple::sptr,
+        size_t recv_frame_size
+    );
     ~usrp2_mboard_impl(void);
 
     inline double get_master_clock_freq(void){
@@ -139,7 +95,7 @@ public:
 private:
     size_t _index;
     int _rev_hi, _rev_lo;
-    const usrp2_io_helper &_io_helper;
+    const size_t _recv_frame_size;
 
     //properties for this mboard
     void get(const wax::obj &, wax::obj &);
@@ -228,23 +184,19 @@ public:
     ~usrp2_impl(void);
 
     //the io interface
-    size_t get_max_send_samps_per_packet(void) const{
-        return _io_helper.get_max_send_samps_per_packet();
-    }
     size_t send(
         const std::vector<const void *> &, size_t,
         const uhd::tx_metadata_t &, const uhd::io_type_t &,
-        uhd::device::send_mode_t
+        uhd::device::send_mode_t, double
     );
-    size_t get_max_recv_samps_per_packet(void) const{
-        return _io_helper.get_max_recv_samps_per_packet();
-    }
     size_t recv(
         const std::vector<void *> &, size_t,
         uhd::rx_metadata_t &, const uhd::io_type_t &,
-        uhd::device::recv_mode_t, size_t
+        uhd::device::recv_mode_t, double
     );
-    bool recv_async_msg(uhd::async_metadata_t &, size_t);
+    size_t get_max_send_samps_per_packet(void) const;
+    size_t get_max_recv_samps_per_packet(void) const;
+    bool recv_async_msg(uhd::async_metadata_t &, double);
 
 private:
     //device properties interface
@@ -257,7 +209,7 @@ private:
 
     //io impl methods and members
     std::vector<uhd::transport::udp_zero_copy::sptr> _data_transports;
-    const usrp2_io_helper _io_helper;
+    uhd::otw_type_t _rx_otw_type, _tx_otw_type;
     UHD_PIMPL_DECL(io_impl) _io_impl;
     void io_init(void);
 };