GPIO tested working on usrp.

Write gpio regs in 32 bit chunks.
ATR regs rx side is high address.

2 files changed, 25 insertions, 22 deletions

diff --git a/host/lib/usrp/usrp2/dboard_interface.cpp b/host/lib/usrp/usrp2/dboard_interface.cpp
index d7c18983a..6dd756420 100644
--- a/host/lib/usrp/usrp2/dboard_interface.cpp
+++ b/host/lib/usrp/usrp2/dboard_interface.cpp
@@ -48,6 +48,7 @@ private:
     );
 
     usrp2_impl *_impl;
+    boost::uint32_t _ddr_shadow;
 };
 
 /***********************************************************************
@@ -62,6 +63,7 @@ dboard_interface::sptr make_usrp2_dboard_interface(usrp2_impl *impl){
  **********************************************************************/
 usrp2_dboard_interface::usrp2_dboard_interface(usrp2_impl *impl){
     _impl = impl;
+    _ddr_shadow = 0;
 
     //set the selection mux to use atr
     boost::uint32_t new_sels = 0x0;
@@ -90,20 +92,23 @@ double usrp2_dboard_interface::get_tx_clock_rate(void){
 /***********************************************************************
  * GPIO
  **********************************************************************/
+static int bank_to_shift(dboard_interface::gpio_bank_t bank){
+    switch(bank){
+    case dboard_interface::GPIO_BANK_RX: return 0;
+    case dboard_interface::GPIO_BANK_TX: return 16;
+    }
+    throw std::runtime_error("unknown gpio bank type");
+}
+
 void usrp2_dboard_interface::set_gpio_ddr(gpio_bank_t bank, boost::uint16_t value){
-    static const uhd::dict<gpio_bank_t, boost::uint32_t> bank_to_addr = boost::assign::map_list_of
-        (GPIO_BANK_RX, FR_GPIO_RX_DDR)
-        (GPIO_BANK_TX, FR_GPIO_TX_DDR)
-    ;
-    _impl->poke16(bank_to_addr[bank], value);
+    _ddr_shadow = \
+        (_ddr_shadow & ~(0xffff << bank_to_shift(bank))) |
+        (boost::uint32_t(value) << bank_to_shift(bank));
+    _impl->poke32(FR_GPIO_DDR, _ddr_shadow);
 }
 
 boost::uint16_t usrp2_dboard_interface::read_gpio(gpio_bank_t bank){
-    static const uhd::dict<gpio_bank_t, boost::uint32_t> bank_to_addr = boost::assign::map_list_of
-        (GPIO_BANK_RX, FR_GPIO_RX_IO)
-        (GPIO_BANK_TX, FR_GPIO_TX_IO)
-    ;
-    return _impl->peek16(bank_to_addr[bank]);
+    return boost::uint16_t(_impl->peek32(FR_GPIO_IO) >> bank_to_shift(bank));
 }
 
 void usrp2_dboard_interface::set_atr_reg(gpio_bank_t bank, atr_reg_t atr, boost::uint16_t value){
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index 0a2de2c6d..77d9f4ad9 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -177,10 +177,8 @@
 //
 #define FR_GPIO_BASE 0xC800
 
-#define FR_GPIO_RX_IO      FR_GPIO_BASE + 0  // 16 io data pins
-#define FR_GPIO_TX_IO      FR_GPIO_BASE + 2  // 16 io data pins
-#define FR_GPIO_RX_DDR     FR_GPIO_BASE + 4  // 16 ddr pins, 1 means output
-#define FR_GPIO_TX_DDR     FR_GPIO_BASE + 6  // 16 ddr pins, 1 means output
+#define FR_GPIO_IO         FR_GPIO_BASE + 0  // 32 bits, gpio io pins (tx high 16 bits, rx low 16 bits)
+#define FR_GPIO_DDR        FR_GPIO_BASE + 4  // 32 bits, gpio ddr, 1 means output (tx high 16 bits, rx low 16 bits)
 #define FR_GPIO_TX_SEL     FR_GPIO_BASE + 8  // 16 2-bit fields select which source goes to TX DB
 #define FR_GPIO_RX_SEL     FR_GPIO_BASE + 12 // 16 2-bit fields select which source goes to RX DB
 
@@ -195,13 +193,13 @@
 ////////////////////////////////////////////////
 #define FR_ATR_BASE  0xE400
 
-#define FR_ATR_IDLE_RXSIDE  FR_ATR_BASE + 0
-#define FR_ATR_IDLE_TXSIDE  FR_ATR_BASE + 2
-#define FR_ATR_INTX_RXSIDE  FR_ATR_BASE + 4
-#define FR_ATR_INTX_TXSIDE  FR_ATR_BASE + 6
-#define FR_ATR_INRX_RXSIDE  FR_ATR_BASE + 8
-#define FR_ATR_INRX_TXSIDE  FR_ATR_BASE + 10
-#define FR_ATR_FULL_RXSIDE  FR_ATR_BASE + 12
-#define FR_ATR_FULL_TXSIDE  FR_ATR_BASE + 14
+#define FR_ATR_IDLE_TXSIDE  FR_ATR_BASE + 0
+#define FR_ATR_IDLE_RXSIDE  FR_ATR_BASE + 2
+#define FR_ATR_INTX_TXSIDE  FR_ATR_BASE + 4
+#define FR_ATR_INTX_RXSIDE  FR_ATR_BASE + 6
+#define FR_ATR_INRX_TXSIDE  FR_ATR_BASE + 8
+#define FR_ATR_INRX_RXSIDE  FR_ATR_BASE + 10
+#define FR_ATR_FULL_TXSIDE  FR_ATR_BASE + 12
+#define FR_ATR_FULL_RXSIDE  FR_ATR_BASE + 14
 
 #endif /* INCLUDED_USRP2_REGS_HPP */