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author | michael-west <michael.west@ettus.com> | 2015-04-22 17:55:43 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2015-04-23 09:48:37 -0700 |
commit | 4e8f0817001d14a9eb2b85f042f185b0c802b6ed (patch) | |
tree | 93e125d6d2280443f54a440e58e0e8afb1cc2f82 /host/lib/usrp/usrp2 | |
parent | 63ba4f76a76d9b04d8642abc71f002cb23a8759d (diff) | |
download | uhd-4e8f0817001d14a9eb2b85f042f185b0c802b6ed.tar.gz uhd-4e8f0817001d14a9eb2b85f042f185b0c802b6ed.tar.bz2 uhd-4e8f0817001d14a9eb2b85f042f185b0c802b6ed.zip |
USRP2: Separate FPGA compat numbers for USRP2 and N200.
Diffstat (limited to 'host/lib/usrp/usrp2')
-rw-r--r-- | host/lib/usrp/usrp2/fw_common.h | 3 | ||||
-rw-r--r-- | host/lib/usrp/usrp2/usrp2_impl.cpp | 25 |
2 files changed, 25 insertions, 3 deletions
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h index cfaee0ddc..81dd3523e 100644 --- a/host/lib/usrp/usrp2/fw_common.h +++ b/host/lib/usrp/usrp2/fw_common.h @@ -30,7 +30,8 @@ extern "C" { #endif //fpga and firmware compatibility numbers -#define USRP2_FPGA_COMPAT_NUM 11 +#define USRP2_FPGA_COMPAT_NUM 10 +#define N200_FPGA_COMPAT_NUM 11 #define USRP2_FW_COMPAT_NUM 12 #define USRP2_FW_VER_MINOR 4 diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp index 50b8431a1..1acc1dad3 100644 --- a/host/lib/usrp/usrp2/usrp2_impl.cpp +++ b/host/lib/usrp/usrp2/usrp2_impl.cpp @@ -395,14 +395,35 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr) : fpga_major = fpga_minor; fpga_minor = 0; } - if (fpga_major != USRP2_FPGA_COMPAT_NUM){ + int expected_fpga_compat_num = std::min(USRP2_FPGA_COMPAT_NUM, N200_FPGA_COMPAT_NUM); + switch (_mbc[mb].iface->get_rev()) + { + case usrp2_iface::USRP2_REV3: + case usrp2_iface::USRP2_REV4: + expected_fpga_compat_num = USRP2_FPGA_COMPAT_NUM; + break; + case usrp2_iface::USRP_N200: + case usrp2_iface::USRP_N200_R4: + case usrp2_iface::USRP_N210: + case usrp2_iface::USRP_N210_R4: + expected_fpga_compat_num = N200_FPGA_COMPAT_NUM; + break; + default: + // handle case where the MB EEPROM is not programmed + if (fpga_major == USRP2_FPGA_COMPAT_NUM or fpga_major == N200_FPGA_COMPAT_NUM) + { + UHD_MSG(warning) << "Unable to identify device - assuming USRP2/N-Series device" << std::endl; + expected_fpga_compat_num = fpga_major; + } + } + if (fpga_major != expected_fpga_compat_num){ throw uhd::runtime_error(str(boost::format( "\nPlease update the firmware and FPGA images for your device.\n" "See the application notes for USRP2/N-Series for instructions.\n" "Expected FPGA compatibility number %d, but got %d:\n" "The FPGA build is not compatible with the host code build.\n" "%s\n" - ) % int(USRP2_FPGA_COMPAT_NUM) % fpga_major % _mbc[mb].iface->images_warn_help_message())); + ) % expected_fpga_compat_num % fpga_major % _mbc[mb].iface->images_warn_help_message())); } _tree->create<std::string>(mb_path / "fpga_version").set(str(boost::format("%u.%u") % fpga_major % fpga_minor)); |