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authorJosh Blum <josh@joshknows.com>2010-05-10 15:14:48 -0700
committerJosh Blum <josh@joshknows.com>2010-05-10 15:14:48 -0700
commitbf7ef6aeb502839797894cac4d7518029a0d04c4 (patch)
tree5af7886da36b56cf80fb2fb80c254a964d453d1d /host/lib/usrp/usrp2/mboard_impl.cpp
parent650e0d9b35eeca9cec3989159310f4d5e3d38836 (diff)
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Moved adc and dac control into codec control source file.
The codec control powers down the chips on destruction.
Diffstat (limited to 'host/lib/usrp/usrp2/mboard_impl.cpp')
-rw-r--r--host/lib/usrp/usrp2/mboard_impl.cpp32
1 files changed, 1 insertions, 31 deletions
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 2c8fd2df4..892e45f49 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -17,7 +17,6 @@
#include "usrp2_impl.hpp"
#include "usrp2_regs.hpp"
-#include "ad9777_regs.hpp"
#include <uhd/usrp/mboard_props.hpp>
#include <uhd/utils/assert.hpp>
#include <uhd/types/mac_addr.hpp>
@@ -38,35 +37,6 @@ void usrp2_impl::mboard_init(void){
boost::bind(&usrp2_impl::mboard_set, this, _1, _2)
);
- _clk_ctrl = clock_control::make_ad9510(_iface);
-
- //setup the ad9777 dac
- ad9777_regs_t ad9777_regs;
- ad9777_regs.x_1r_2r_mode = ad9777_regs_t::X_1R_2R_MODE_1R;
- ad9777_regs.filter_interp_rate = ad9777_regs_t::FILTER_INTERP_RATE_4X;
- ad9777_regs.mix_mode = ad9777_regs_t::MIX_MODE_REAL;
- ad9777_regs.pll_divide_ratio = ad9777_regs_t::PLL_DIVIDE_RATIO_DIV1;
- ad9777_regs.pll_state = ad9777_regs_t::PLL_STATE_OFF;
- ad9777_regs.auto_cp_control = ad9777_regs_t::AUTO_CP_CONTROL_ENB;
- //I dac values
- ad9777_regs.idac_fine_gain_adjust = 0;
- ad9777_regs.idac_coarse_gain_adjust = 0xf;
- ad9777_regs.idac_offset_adjust_lsb = 0;
- ad9777_regs.idac_offset_adjust_msb = 0;
- //Q dac values
- ad9777_regs.qdac_fine_gain_adjust = 0;
- ad9777_regs.qdac_coarse_gain_adjust = 0xf;
- ad9777_regs.qdac_offset_adjust_lsb = 0;
- ad9777_regs.qdac_offset_adjust_msb = 0;
- //write all regs
- for(boost::uint8_t addr = 0; addr <= 0xC; addr++){
- boost::uint16_t data = ad9777_regs.get_write_reg(addr);
- _iface->transact_spi(SPI_SS_AD9777, spi_config_t::EDGE_RISE, data, 16, false /*no rb*/);
- }
-
- //enable ADCs
- _iface->poke32(FR_MISC_CTRL_ADC, FRF_MISC_CTRL_ADC_ON);
-
//set up serdes
_iface->poke32(FR_MISC_CTRL_SERDES, FRF_MISC_CTRL_SERDES_ENABLE | FRF_MISC_CTRL_SERDES_RXEN);
@@ -112,7 +82,7 @@ void usrp2_impl::update_clock_config(void){
//clock source ref 10mhz
bool use_external = _clock_config.ref_source != clock_config_t::REF_INT;
- _clk_ctrl->enable_external_ref(use_external);
+ _clock_ctrl->enable_external_ref(use_external);
}
void usrp2_impl::set_time_spec(const time_spec_t &time_spec, bool now){