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author | Josh Blum <josh@joshknows.com> | 2010-08-24 17:34:24 +0000 |
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committer | Josh Blum <josh@joshknows.com> | 2010-08-24 17:34:24 +0000 |
commit | e0d55c79f5e61858dbe75ca96abfbd7a6a4e8f97 (patch) | |
tree | 24cc392414a06d822e056baff66f81d41c567fc7 /host/lib/usrp/usrp2/dboard_iface.cpp | |
parent | 038189c02b369788f5fc32ee330b814499cec407 (diff) | |
parent | 48ad3b734314bdec2128dacb20b09fd4cf1f5979 (diff) | |
download | uhd-e0d55c79f5e61858dbe75ca96abfbd7a6a4e8f97.tar.gz uhd-e0d55c79f5e61858dbe75ca96abfbd7a6a4e8f97.tar.bz2 uhd-e0d55c79f5e61858dbe75ca96abfbd7a6a4e8f97.zip |
Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e
Diffstat (limited to 'host/lib/usrp/usrp2/dboard_iface.cpp')
-rw-r--r-- | host/lib/usrp/usrp2/dboard_iface.cpp | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp index 8bded1ea3..f6d2b718a 100644 --- a/host/lib/usrp/usrp2/dboard_iface.cpp +++ b/host/lib/usrp/usrp2/dboard_iface.cpp @@ -51,6 +51,7 @@ public: void set_atr_reg(unit_t, atr_reg_t, boost::uint16_t); void set_gpio_ddr(unit_t, boost::uint16_t); void write_gpio(unit_t, boost::uint16_t); + void set_gpio_debug(unit_t, int); boost::uint16_t read_gpio(unit_t); void write_i2c(boost::uint8_t, const byte_vector_t &); @@ -219,6 +220,25 @@ void usrp2_dboard_iface::set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t _iface->poke16(unit_to_atr_to_addr[unit][atr], value); } +void usrp2_dboard_iface::set_gpio_debug(unit_t unit, int which){ + this->set_gpio_ddr(unit, 0xffff); //all outputs + + //calculate the new selection mux setting + boost::uint32_t new_sels = 0x0; + int sel = (which == 0)? + U2_FLAG_GPIO_SEL_DEBUG_0: + U2_FLAG_GPIO_SEL_DEBUG_1; + for(size_t i = 0; i < 16; i++){ + new_sels |= sel << (i*2); + } + + //write the selection mux value to register + switch(unit){ + case UNIT_RX: _iface->poke32(U2_REG_GPIO_RX_SEL, new_sels); return; + case UNIT_TX: _iface->poke32(U2_REG_GPIO_TX_SEL, new_sels); return; + } +} + /*********************************************************************** * SPI **********************************************************************/ |