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authorNick Foster <nick@ettus.com>2011-06-09 18:34:19 -0700
committerJosh Blum <josh@joshknows.com>2011-06-10 15:39:23 -0700
commitb36096d18b067689780984931d16e22c443799df (patch)
tree4a5c27aa317184b0a8fcb073a8c82e66814a7209 /host/lib/usrp/usrp1
parent09cf8eb16444b0c744b47b39b077f9d0fbb09886 (diff)
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B100/USRP1: fix bug where fpga size div by 64 resulted in never finishing load
Diffstat (limited to 'host/lib/usrp/usrp1')
-rw-r--r--host/lib/usrp/usrp1/usrp1_ctrl.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/host/lib/usrp/usrp1/usrp1_ctrl.cpp b/host/lib/usrp/usrp1/usrp1_ctrl.cpp
index 2e6f6e014..b29e779c1 100644
--- a/host/lib/usrp/usrp1/usrp1_ctrl.cpp
+++ b/host/lib/usrp/usrp1/usrp1_ctrl.cpp
@@ -240,6 +240,7 @@ public:
while (not file.eof()) {
file.read((char *)buf, sizeof(buf));
size_t n = file.gcount();
+ if(n == 0) continue;
int ret = usrp_control_write(VRQ_FPGA_LOAD, 0, FL_XFER, buf, n);
if (ret < 0 or size_t(ret) != n) {
throw uhd::io_error("usrp_load_fpga: fpga load error");