Merge branch 'maint'

Conflicts:
	fpga-src
	host/CMakeLists.txt
	host/cmake/Modules/UHDVersion.cmake
	host/lib/usrp/b200/b200_impl.hpp
	host/lib/usrp/e300/e300_fpga_defs.hpp
	host/lib/usrp/x300/x300_fw_common.h

3 files changed, 34 insertions, 24 deletions

diff --git a/host/lib/usrp/e300/e300_defaults.hpp b/host/lib/usrp/e300/e300_defaults.hpp
index 7a8d49719..41e8453c4 100644
--- a/host/lib/usrp/e300/e300_defaults.hpp
+++ b/host/lib/usrp/e300/e300_defaults.hpp
@@ -41,7 +41,7 @@ static const std::string DEFAULT_CLOCK_SRC  = "internal";
 static const size_t DEFAULT_RX_DATA_FRAME_SIZE = 4096;
 static const size_t DEFAULT_RX_DATA_NUM_FRAMES = 32;
 
-static const size_t DEFAULT_TX_DATA_FRAME_SIZE = 2048;
+static const size_t DEFAULT_TX_DATA_FRAME_SIZE = 4096;
 static const size_t DEFAULT_TX_DATA_NUM_FRAMES = 32;
 
 static const size_t DEFAULT_CTRL_FRAME_SIZE    = 64;
diff --git a/host/lib/usrp/e300/e300_impl.cpp b/host/lib/usrp/e300/e300_impl.cpp
index 231816fe8..de2357100 100644
--- a/host/lib/usrp/e300/e300_impl.cpp
+++ b/host/lib/usrp/e300/e300_impl.cpp
@@ -284,32 +284,36 @@ e300_impl::e300_impl(const uhd::device_addr_t &device_addr)
     // load the fpga image
     ////////////////////////////////////////////////////////////////////
     if (_xport_path == AXI) {
-        if (not device_addr.has_key("no_reload_fpga")) {
+        _do_not_reload = device_addr.has_key("no_reload_fpga");
+        if (not _do_not_reload) {
             // Load FPGA image if provided via args
-            if (device_addr.has_key("fpga")) {
-                common::load_fpga_image(device_addr["fpga"]);
-            // Else load the FPGA image based on the product ID
-            } else {
-                //extract the FPGA path for the e300
-                const boost::uint16_t pid = boost::lexical_cast<boost::uint16_t>(
+            const boost::uint16_t pid = boost::lexical_cast<boost::uint16_t>(
                     device_addr["product"]);
-                std::string fpga_image;
-                switch(e300_eeprom_manager::get_mb_type(pid)) {
-                case e300_eeprom_manager::USRP_E310_MB:
-                    fpga_image = find_image_path(E310_FPGA_FILE_NAME);
-                    break;
-                case e300_eeprom_manager::USRP_E300_MB:
-                    fpga_image = find_image_path(E300_FPGA_FILE_NAME);
-                    break;
-                case e300_eeprom_manager::UNKNOWN:
-                default:
-                    UHD_MSG(warning) << "Unknown motherboard type, loading e300 image."
+
+            std::string fpga_image;
+
+            //extract the FPGA path for the e300
+            switch(e300_eeprom_manager::get_mb_type(pid)) {
+            case e300_eeprom_manager::USRP_E310_MB:
+                fpga_image = device_addr.cast<std::string>("fpga",
+                    find_image_path(E310_FPGA_FILE_NAME));
+                _idle_image = find_image_path(E310_FPGA_IDLE_FILE_NAME);
+                break;
+            case e300_eeprom_manager::USRP_E300_MB:
+                fpga_image = device_addr.cast<std::string>("fpga",
+                    find_image_path(E300_FPGA_FILE_NAME));
+                _idle_image = find_image_path(E300_FPGA_IDLE_FILE_NAME);
+                break;
+            case e300_eeprom_manager::UNKNOWN:
+            default:
+                UHD_MSG(warning) << "Unknown motherboard type, loading e300 image."
                                      << std::endl;
-                    fpga_image = find_image_path(E300_FPGA_FILE_NAME);
-                    break;
-                }
-                common::load_fpga_image(fpga_image);
+                fpga_image = device_addr.cast<std::string>("fpga",
+                    find_image_path(E300_FPGA_FILE_NAME));
+                _idle_image = find_image_path(E300_FPGA_IDLE_FILE_NAME);
+                break;
             }
+            common::load_fpga_image(fpga_image);
         }
     }
 
@@ -623,7 +627,8 @@ uhd::sensor_value_t e300_impl::_get_fe_pll_lock(const bool is_tx)
 
 e300_impl::~e300_impl(void)
 {
-    /* NOP */
+    if (_xport_path == AXI and not _do_not_reload)
+        common::load_fpga_image(_idle_image);
 }
 
 void e300_impl::_enforce_tick_rate_limits(
diff --git a/host/lib/usrp/e300/e300_impl.hpp b/host/lib/usrp/e300/e300_impl.hpp
index 21aef215d..c530a5d72 100644
--- a/host/lib/usrp/e300/e300_impl.hpp
+++ b/host/lib/usrp/e300/e300_impl.hpp
@@ -51,6 +51,9 @@ namespace uhd { namespace usrp { namespace e300 {
 static const std::string E300_FPGA_FILE_NAME = "usrp_e300_fpga.bit";
 static const std::string E310_FPGA_FILE_NAME = "usrp_e310_fpga.bit";
 
+static const std::string E300_FPGA_IDLE_FILE_NAME = "usrp_e300_fpga_idle.bit";
+static const std::string E310_FPGA_IDLE_FILE_NAME = "usrp_e310_fpga_idle.bit";
+
 static const std::string E300_TEMP_SYSFS = "iio:device0";
 static const std::string E300_SPIDEV_DEVICE  = "/dev/spidev0.1";
 static const std::string E300_I2CDEV_DEVICE  = "/dev/i2c-0";
@@ -285,6 +288,8 @@ private: // members
     e300_eeprom_manager::sptr              _eeprom_manager;
     uhd::transport::zero_copy_xport_params _data_xport_params;
     uhd::transport::zero_copy_xport_params _ctrl_xport_params;
+    std::string                            _idle_image;
+    bool                                   _do_not_reload;
     gpio_t                                 _misc;
     gps::ublox::ubx::control::sptr _gps;
 };