e100: squashed host code for fifo control/timed commands

This uses the new b100/e100 common core and FIFO control modules.
Subsequent commit will be the compatible FPGA merge.

Conflicts:

	host/lib/usrp/e100/io_impl.cpp

1 files changed, 2 insertions, 141 deletions

diff --git a/host/lib/usrp/e100/io_impl.cpp b/host/lib/usrp/e100/io_impl.cpp
index 332fe76ae..4d521e222 100644
--- a/host/lib/usrp/e100/io_impl.cpp
+++ b/host/lib/usrp/e100/io_impl.cpp
@@ -15,27 +15,16 @@
 // along with this program.  If not, see <http://www.gnu.org/licenses/>.
 //
 
-#include "recv_packet_demuxer.hpp"
 #include "validate_subdev_spec.hpp"
 #include "async_packet_handler.hpp"
 #include "../../transport/super_recv_packet_handler.hpp"
 #include "../../transport/super_send_packet_handler.hpp"
-#include <linux/usrp_e.h> //ioctl structures and constants
 #include "e100_impl.hpp"
-#include "e100_regs.hpp"
 #include <uhd/utils/msg.hpp>
 #include <uhd/utils/log.hpp>
 #include <uhd/utils/tasks.hpp>
-#include <uhd/utils/thread_priority.hpp>
-#include <uhd/transport/bounded_buffer.hpp>
 #include <boost/bind.hpp>
 #include <boost/format.hpp>
-#include <boost/bind.hpp>
-#include <boost/thread/thread.hpp>
-#include <poll.h> //poll
-#include <fcntl.h> //open, close
-#include <sstream>
-#include <fstream>
 #include <boost/make_shared.hpp>
 
 using namespace uhd;
@@ -44,134 +33,7 @@ using namespace uhd::transport;
 
 static const size_t vrt_send_header_offset_words32 = 1;
 
-/***********************************************************************
- * io impl details (internal to this file)
- * - pirate crew of 1
- * - bounded buffer
- * - thread loop
- * - vrt packet handler states
- **********************************************************************/
-struct e100_impl::io_impl{
-    io_impl(void):
-        false_alarm(0), async_msg_fifo(1000/*messages deep*/)
-    { /* NOP */ }
-
-    double tick_rate; //set by update tick rate method
-    e100_ctrl::sptr iface; //so handle irq can peek and poke
-    void handle_irq(void);
-    size_t false_alarm;
-    //The data transport is listed first so that it is deconstructed last,
-    //which is after the states and booty which may hold managed buffers.
-    recv_packet_demuxer::sptr demuxer;
-
-    //a pirate's life is the life for me!
-    void recv_pirate_loop(
-        spi_iface::sptr //keep a sptr to iface which shares gpio147
-    ){
-        //open the GPIO and set it up for an IRQ
-        std::ofstream edge_file("/sys/class/gpio/gpio147/edge");
-        edge_file << "rising" << std::endl << std::flush;
-        edge_file.close();
-        int fd = ::open("/sys/class/gpio/gpio147/value", O_RDONLY);
-        if (fd < 0) UHD_MSG(error) << "Unable to open GPIO for IRQ\n";
-
-        while (not boost::this_thread::interruption_requested()){
-            pollfd pfd;
-            pfd.fd = fd;
-            pfd.events = POLLPRI | POLLERR;
-            ssize_t ret = ::poll(&pfd, 1, 100/*ms*/);
-            if (ret > 0) this->handle_irq();
-        }
-
-        //cleanup before thread exit
-        ::close(fd);
-    }
-    bounded_buffer<async_metadata_t> async_msg_fifo;
-    task::sptr pirate_task;
-};
-
-void e100_impl::io_impl::handle_irq(void){
-    //check the status of the async msg buffer
-    const boost::uint32_t status = iface->peek32(E100_REG_RB_ERR_STATUS);
-    if ((status & 0x3) == 0){ //not done or error
-        //This could be a false-alarm because spi readback is mixed in.
-        //So we just sleep for a bit rather than interrupt continuously.
-        if (false_alarm++ > 3) boost::this_thread::sleep(boost::posix_time::milliseconds(1));
-        return;
-    }
-    false_alarm = 0; //its a real message, reset the count...
-    //std::cout << boost::format("status: 0x%x") % status << std::endl;
-
-    //load the data struct and call the ioctl
-    usrp_e_ctl32 data;
-    data.offset = E100_REG_ERR_BUFF;
-    data.count = status >> 16;
-    iface->ioctl(USRP_E_READ_CTL32, &data);
-    //for (size_t i = 0; i < data.count; i++){
-        //data.buf[i] = iface->peek32(E100_REG_ERR_BUFF + i*sizeof(boost::uint32_t));
-        //std::cout << boost::format("    buff[%u] = 0x%08x\n") % i % data.buf[i];
-    //}
-
-    //unpack the vrt header and process below...
-    vrt::if_packet_info_t if_packet_info;
-    if_packet_info.num_packet_words32 = data.count;
-    try{vrt::if_hdr_unpack_le(data.buf, if_packet_info);}
-    catch(const std::exception &e){
-        UHD_MSG(error) << "Error unpacking vrt header:\n" << e.what() << std::endl;
-        goto prepare;
-    }
-
-    //handle a tx async report message
-    if (if_packet_info.sid == E100_TX_ASYNC_SID and if_packet_info.packet_type != vrt::if_packet_info_t::PACKET_TYPE_DATA){
-
-        //fill in the async metadata
-        async_metadata_t metadata;
-        load_metadata_from_buff(uhd::wtohx<boost::uint32_t>, metadata, if_packet_info, data.buf, tick_rate);
-
-        //push the message onto the queue
-        async_msg_fifo.push_with_pop_on_full(metadata);
-
-        //print some fastpath messages
-        standard_async_msg_prints(metadata);
-    }
-
-    //prepare for the next round
-    prepare:
-    iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 0); //clear
-    while ((iface->peek32(E100_REG_RB_ERR_STATUS) & (1 << 2)) == 0){} //wait for idle
-    iface->poke32(E100_REG_SR_ERR_CTRL, 1 << 1); //start
-}
-
-/***********************************************************************
- * Helper Functions
- **********************************************************************/
-void e100_impl::io_init(void){
-
-    //create new io impl
-    _io_impl = UHD_PIMPL_MAKE(io_impl, ());
-    _io_impl->demuxer = recv_packet_demuxer::make(_data_transport, _rx_dsps.size(), E100_RX_SID_BASE);
-    _io_impl->iface = _fpga_ctrl;
-
-    //clear fifo state machines
-    _fpga_ctrl->poke32(E100_REG_CLEAR_FIFO, 0);
-
-    //allocate streamer weak ptrs containers
-    _rx_streamers.resize(_rx_dsps.size());
-    _tx_streamers.resize(1/*known to be 1 dsp*/);
-
-    //prepare the async msg buffer for incoming messages
-    _fpga_ctrl->poke32(E100_REG_SR_ERR_CTRL, 1 << 0); //clear
-    while ((_fpga_ctrl->peek32(E100_REG_RB_ERR_STATUS) & (1 << 2)) == 0){} //wait for idle
-    _fpga_ctrl->poke32(E100_REG_SR_ERR_CTRL, 1 << 1); //start
-
-    //spawn a pirate, yarrr!
-    _io_impl->pirate_task = task::make(boost::bind(
-        &e100_impl::io_impl::recv_pirate_loop, _io_impl.get(), _aux_spi_iface
-    ));
-}
-
 void e100_impl::update_tick_rate(const double rate){
-    _io_impl->tick_rate = rate;
 
     //update the tick rate on all existing streamers -> thread safe
     for (size_t i = 0; i < _rx_streamers.size(); i++){
@@ -254,8 +116,7 @@ void e100_impl::update_tx_subdev_spec(const uhd::usrp::subdev_spec_t &spec){
 bool e100_impl::recv_async_msg(
     async_metadata_t &async_metadata, double timeout
 ){
-    boost::this_thread::disable_interruption di; //disable because the wait can throw
-    return _io_impl->async_msg_fifo.pop_with_timed_wait(async_metadata, timeout);
+    return _fifo_ctrl->pop_async_msg(async_metadata, timeout);
 }
 
 /***********************************************************************
@@ -300,7 +161,7 @@ rx_streamer::sptr e100_impl::get_rx_stream(const uhd::stream_args_t &args_){
         _rx_dsps[dsp]->set_nsamps_per_packet(spp); //seems to be a good place to set this
         _rx_dsps[dsp]->setup(args);
         my_streamer->set_xport_chan_get_buff(chan_i, boost::bind(
-            &recv_packet_demuxer::get_recv_buff, _io_impl->demuxer, dsp, _1
+            &recv_packet_demuxer::get_recv_buff, _recv_demuxer, dsp, _1
         ), true /*flush*/);
         my_streamer->set_overflow_handler(chan_i, boost::bind(
             &rx_dsp_core_200::handle_overflow, _rx_dsps[dsp]