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authorJosh Blum <josh@joshknows.com>2012-02-04 16:38:15 -0800
committerJosh Blum <josh@joshknows.com>2012-02-04 16:38:15 -0800
commitc6e63c9d2af2c0b2e168aa6fdd63fe7b214927de (patch)
tree7d2bf4c7480f68c55eb215fcad16ef400d29dfcc /host/lib/usrp/e100/e100_regs.hpp
parent1e3cb86432ee1d695a12fd99590206e43caab2cc (diff)
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b100/e100: unify rx/tx fifo clears into one
Diffstat (limited to 'host/lib/usrp/e100/e100_regs.hpp')
-rw-r--r--host/lib/usrp/e100/e100_regs.hpp6
1 files changed, 2 insertions, 4 deletions
diff --git a/host/lib/usrp/e100/e100_regs.hpp b/host/lib/usrp/e100/e100_regs.hpp
index eee27b5b3..0ec5f4de3 100644
--- a/host/lib/usrp/e100/e100_regs.hpp
+++ b/host/lib/usrp/e100/e100_regs.hpp
@@ -116,8 +116,7 @@
#define UE_SR_TX_FRONT 54 // 5 regs (+0 to +4)
#define UE_SR_REG_TEST32 60 // 1 reg
-#define UE_SR_CLEAR_RX_FIFO 61 // 1 reg
-#define UE_SR_CLEAR_TX_FIFO 62 // 1 reg
+#define UE_SR_CLEAR_FIFO 61 // 1 reg
#define UE_SR_GLOBAL_RESET 63 // 1 reg
#define UE_SR_USER_REGS 64 // 2 regs
@@ -131,8 +130,7 @@
/////////////////////////////////////////////////
// Magic reset regs
////////////////////////////////////////////////
-#define E100_REG_CLEAR_RX E100_REG_SR_ADDR(UE_SR_CLEAR_RX_FIFO)
-#define E100_REG_CLEAR_TX E100_REG_SR_ADDR(UE_SR_CLEAR_RX_FIFO)
+#define E100_REG_CLEAR_FIFO E100_REG_SR_ADDR(UE_SR_CLEAR_FIFO)
#define E100_REG_GLOBAL_RESET E100_REG_SR_ADDR(UE_SR_GLOBAL_RESET)
#endif