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authorBen Hilburn <ben@ettus.com>2012-11-05 11:45:07 -0800
committerJosh Blum <josh@joshknows.com>2012-11-07 12:12:00 -0800
commited6fc0788832aecd9379e833dd8dee4413b71b38 (patch)
treec978b0cdf5ee5165c82af798c4f58bdeb2fd0d52 /host/lib/usrp/dboard
parent2685196968ccbe436ae7945a1a705945537a4cb0 (diff)
downloaduhd-ed6fc0788832aecd9379e833dd8dee4413b71b38.tar.gz
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wbx v4: fixing the drivers for the new rev of the WBX board
Diffstat (limited to 'host/lib/usrp/dboard')
-rw-r--r--host/lib/usrp/dboard/db_wbx_version4.cpp53
1 files changed, 37 insertions, 16 deletions
diff --git a/host/lib/usrp/dboard/db_wbx_version4.cpp b/host/lib/usrp/dboard/db_wbx_version4.cpp
index 3a85826cd..c1de2af56 100644
--- a/host/lib/usrp/dboard/db_wbx_version4.cpp
+++ b/host/lib/usrp/dboard/db_wbx_version4.cpp
@@ -115,22 +115,43 @@ wbx_base::wbx_version4::wbx_version4(wbx_base *_self_wbx_base) {
int v4_tx_mod = ADF4351_PDBRF;
//set the gpio directions and atr controls
- self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_TX, v4_tx_mod|v4_iobits);
- self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_RX, RXBB_PDB|ADF4351_PDBRF);
- self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, TX_PUP_5V|TX_PUP_3V|v4_tx_mod|v4_iobits);
- self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, RX_PUP_5V|RX_PUP_3V|ADF4351_CE|RXBB_PDB|ADF4351_PDBRF|RX_ATTN_MASK);
-
- //setup ATR for the mixer enables (always enabled to prevent phase slip between bursts)
- //set TX gain iobits to min gain (max attenuation) when RX_ONLY or IDLE to suppress LO leakage
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, v4_tx_mod, TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
-
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
- self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_TX, \
+ v4_tx_mod|v4_iobits);
+ self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_RX, \
+ RXBB_PDB|ADF4351_PDBRF);
+ self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, \
+ TX_PUP_5V|TX_PUP_3V|v4_tx_mod|v4_iobits);
+ self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, \
+ RX_PUP_5V|RX_PUP_3V|ADF4351_CE|RXBB_PDB|ADF4351_PDBRF|RX_ATTN_MASK);
+
+ //setup ATR for the mixer enables (always enabled to prevent phase slip
+ //between bursts) set TX gain iobits to min gain (max attenuation) when
+ //RX_ONLY or IDLE to suppress LO leakage
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_IDLE, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_RX_ONLY, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_TX_ONLY, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, \
+ dboard_iface::ATR_REG_FULL_DUPLEX, v4_tx_mod, \
+ TX_ATTN_MASK | TX_MIXER_DIS | v4_tx_mod);
+
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_IDLE, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_TX_ONLY, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_RX_ONLY, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
+ self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, \
+ dboard_iface::ATR_REG_FULL_DUPLEX, \
+ RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
}
wbx_base::wbx_version4::~wbx_version4(void){