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authormattprost <matt.prost@ni.com>2022-04-06 13:51:35 -0500
committerAaron Rossetto <aaron.rossetto@ni.com>2022-04-07 13:28:02 -0700
commiteacbf15e30313793841ca6e4abd9cad02fffa5b4 (patch)
tree43e11ddcad3ef23c40b33f79d67afe54c92d270a /host/lib/usrp/dboard
parent14a4b969b6757f3d4f24cfb69122ca2fd630e59a (diff)
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n310: cpld: Get and set TX ATR bits
This allows the user to get the current state of the tx atr bits and set them back to a given state. This is useful for the n310 when resetting the front end, in order to avoid any tx power out of the frontend when the init_cals are run. Signed-off-by: mattprost <matt.prost@ni.com>
Diffstat (limited to 'host/lib/usrp/dboard')
-rw-r--r--host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp48
-rw-r--r--host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp18
2 files changed, 66 insertions, 0 deletions
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp
index 172f26390..640195f5f 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.cpp
@@ -236,6 +236,54 @@ void magnesium_cpld_ctrl::set_tx_atr_bits(const chan_sel_t chan,
}
}
+void magnesium_cpld_ctrl::set_tx_atr_bits(const chan_sel_t chan,
+ const atr_state_t atr_state,
+ const tx_atr_bits_t atr_bits,
+ const bool defer_commit)
+{
+ set_tx_atr_bits(chan,
+ atr_state,
+ atr_bits.tx_led,
+ atr_bits.tx_pa_en,
+ atr_bits.tx_amp_en,
+ atr_bits.tx_myk_en,
+ defer_commit);
+}
+
+
+tx_atr_bits_t magnesium_cpld_ctrl::get_tx_atr_bits(
+ const chan_sel_t chan, const atr_state_t atr_state)
+{
+ std::lock_guard<std::mutex> l(_set_mutex);
+ tx_atr_bits_t retval;
+ if (chan == CHAN1 or chan == BOTH) {
+ if (atr_state == IDLE or atr_state == ANY) {
+ retval.tx_led = bool(_regs.get_state_ch1_idle_tx_led());
+ retval.tx_pa_en = bool(_regs.get_state_ch1_idle_tx_pa_en());
+ retval.tx_amp_en = bool(_regs.get_state_ch1_idle_tx_amp_en());
+ retval.tx_myk_en = bool(_regs.get_state_ch1_idle_tx_myk_en());
+ } else {
+ retval.tx_led = bool(_regs.get_state_ch1_on_tx_led());
+ retval.tx_pa_en = bool(_regs.get_state_ch1_on_tx_pa_en());
+ retval.tx_amp_en = bool(_regs.get_state_ch1_on_tx_amp_en());
+ retval.tx_myk_en = bool(_regs.get_state_ch1_on_tx_myk_en());
+ }
+ } else {
+ if (atr_state == IDLE or atr_state == ANY) {
+ retval.tx_led = bool(_regs.get_state_ch2_idle_tx_led());
+ retval.tx_pa_en = bool(_regs.get_state_ch2_idle_tx_pa_en());
+ retval.tx_amp_en = bool(_regs.get_state_ch2_idle_tx_amp_en());
+ retval.tx_myk_en = bool(_regs.get_state_ch2_idle_tx_myk_en());
+ } else {
+ retval.tx_led = bool(_regs.get_state_ch2_on_tx_led());
+ retval.tx_pa_en = bool(_regs.get_state_ch2_on_tx_pa_en());
+ retval.tx_amp_en = bool(_regs.get_state_ch2_on_tx_amp_en());
+ retval.tx_myk_en = bool(_regs.get_state_ch2_on_tx_myk_en());
+ }
+ }
+ return retval;
+}
+
void magnesium_cpld_ctrl::set_trx_sw_atr_bits(const chan_sel_t chan,
const atr_state_t atr_state,
const sw_trx_t trx_sw,
diff --git a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp
index 27341673c..39c3f74c2 100644
--- a/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp
+++ b/host/lib/usrp/dboard/magnesium/magnesium_cpld_ctrl.hpp
@@ -15,6 +15,17 @@
#include <memory>
#include <mutex>
+//! Structs for interfacing with the cpld register state
+// TODO: add structs and supporting function calls for other parts of the
+// magnesium cpld reg interface
+struct tx_atr_bits_t
+{
+ bool tx_led = false;
+ bool tx_pa_en = false;
+ bool tx_amp_en = false;
+ bool tx_myk_en = false;
+};
+
//! Controls the CPLD on a Magnesium daughterboard
//
// Setters are thread-safe through lock guards. This lets a CPLD control object
@@ -215,6 +226,13 @@ public:
const bool tx_myk_enb,
const bool defer_commit = false);
+ void set_tx_atr_bits(const chan_sel_t chan,
+ const atr_state_t atr_state,
+ const tx_atr_bits_t atr_bits,
+ const bool defer_commit = false);
+
+ tx_atr_bits_t get_tx_atr_bits(const chan_sel_t chan, const atr_state_t atr_state);
+
/*! ATR settings: TRX switch
*
* Note: This ATR state is frequency dependent.