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author | Wade Fife <wade.fife@ettus.com> | 2022-03-21 16:27:07 -0500 |
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committer | Wade Fife <wade.fife@ettus.com> | 2022-03-23 08:55:36 -0500 |
commit | febf339e0df412e54cf43a204c280128d8ca1ec3 (patch) | |
tree | 8e1c8473a70f526f68b061fd886152a7aefa522b /host/lib/usrp/common | |
parent | 6fb6a6bdf109b4d3eaa4247a38f736912d640d06 (diff) | |
download | uhd-febf339e0df412e54cf43a204c280128d8ca1ec3.tar.gz uhd-febf339e0df412e54cf43a204c280128d8ca1ec3.tar.bz2 uhd-febf339e0df412e54cf43a204c280128d8ca1ec3.zip |
fpga: e31x: Fix DRAM traffic gen IP name
Change name in DRAM IP Makefile from IP_MIG_7SERIES_TG_SRCS to
IP_DDR3_16BIT_TG_SRCS to match the naming of other variables.
Diffstat (limited to 'host/lib/usrp/common')
0 files changed, 0 insertions, 0 deletions