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| author | michael-west <michael.west@ettus.com> | 2014-06-06 15:27:02 -0700 |
|---|---|---|
| committer | michael-west <michael.west@ettus.com> | 2014-06-06 15:27:02 -0700 |
| commit | 05559d64b9c061c0da11cacec46f11fe03d852cb (patch) | |
| tree | 732f4de13e6c0e8d5f5b8136b3f5a3eaa82f110f /host/lib/usrp/b200 | |
| parent | 054a752bb25f9e17c1269b28ad2a95865c0d63a2 (diff) | |
| download | uhd-05559d64b9c061c0da11cacec46f11fe03d852cb.tar.gz uhd-05559d64b9c061c0da11cacec46f11fe03d852cb.tar.bz2 uhd-05559d64b9c061c0da11cacec46f11fe03d852cb.zip | |
Fix for BUG #500: B210: RX channels are not phase aligned
- Adding UHD side code to invert second RX channel
Diffstat (limited to 'host/lib/usrp/b200')
| -rw-r--r-- | host/lib/usrp/b200/b200_impl.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp index 98141dbaa..261183128 100644 --- a/host/lib/usrp/b200/b200_impl.cpp +++ b/host/lib/usrp/b200/b200_impl.cpp @@ -518,6 +518,7 @@ void b200_impl::setup_radio(const size_t dspno) perif.framer = rx_vita_core_3000::make(perif.ctrl, TOREG(SR_RX_CTRL)); perif.ddc = rx_dsp_core_3000::make(perif.ctrl, TOREG(SR_RX_DSP), true /*is_b200?*/); perif.ddc->set_link_rate(10e9/8); //whatever + perif.ddc->set_mux("IQ", false, dspno == 1 ? true : false, dspno == 1 ? true : false); _tree->access<double>(mb_path / "tick_rate") .subscribe(boost::bind(&rx_vita_core_3000::set_tick_rate, perif.framer, _1)) .subscribe(boost::bind(&rx_dsp_core_3000::set_tick_rate, perif.ddc, _1)); |