b200: Moved AD9361 driver to host

- Switched to FPGA SPI engine
- Moved firmware AD9361 driver to UHD
- Bumped FW compat to 5, FPGA compat to 4
- Known Issue: AD9361 SPI rate is too slow

4 files changed, 13 insertions, 12 deletions

diff --git a/host/lib/usrp/b200/b200_iface.hpp b/host/lib/usrp/b200/b200_iface.hpp
index 20b4a7a89..18d058386 100644
--- a/host/lib/usrp/b200/b200_iface.hpp
+++ b/host/lib/usrp/b200/b200_iface.hpp
@@ -35,8 +35,7 @@ static const std::string     B200_FW_FILE_NAME = "usrp_b200_fw.hex";
 static const std::string     B200_FPGA_FILE_NAME = "usrp_b200_fpga.bin";
 static const std::string     B210_FPGA_FILE_NAME = "usrp_b210_fpga.bin";
 
-class UHD_API b200_iface: boost::noncopyable, public virtual uhd::i2c_iface,
-                  public ad9361_ctrl_iface_type {
+class UHD_API b200_iface: boost::noncopyable, public virtual uhd::i2c_iface {
 public:
     typedef boost::shared_ptr<b200_iface> sptr;
 
diff --git a/host/lib/usrp/b200/b200_impl.cpp b/host/lib/usrp/b200/b200_impl.cpp
index 245fbf4a9..04cb8062e 100644
--- a/host/lib/usrp/b200/b200_impl.cpp
+++ b/host/lib/usrp/b200/b200_impl.cpp
@@ -339,10 +339,18 @@ b200_impl::b200_impl(const device_addr_t &device_addr)
     _demux = recv_packet_demuxer_3000::make(_data_transport);
 
     ////////////////////////////////////////////////////////////////////
+    // create time and clock control objects
+    ////////////////////////////////////////////////////////////////////
+    _spi_iface = spi_core_3000::make(_local_ctrl, TOREG(SR_CORE_SPI), RB32_CORE_SPI);
+    _spi_iface->set_divider(B200_BUS_CLOCK_RATE/ADF4001_SPI_RATE);
+    _adf4001_iface = boost::shared_ptr<adf4001_ctrl>(new adf4001_ctrl(_spi_iface, ADF4001_SLAVENO));
+
+    ////////////////////////////////////////////////////////////////////
     // Init codec - turns on clocks
     ////////////////////////////////////////////////////////////////////
     UHD_MSG(status) << "Initialize CODEC control..." << std::endl;
-    _codec_ctrl = ad9361_ctrl::make(_iface);
+    _codec_ctrl = ad9361_ctrl::make(
+        ad9361_ctrl_transport::make_software_spi(AD9361_B200, _spi_iface, AD9361_SLAVENO));
     this->reset_codec_dcm();
 
     ////////////////////////////////////////////////////////////////////
@@ -405,13 +413,6 @@ b200_impl::b200_impl(const device_addr_t &device_addr)
     }
     _codec_ctrl->data_port_loopback(false);
 
-    ////////////////////////////////////////////////////////////////////
-    // create time and clock control objects
-    ////////////////////////////////////////////////////////////////////
-    _spi_iface = spi_core_3000::make(_local_ctrl, TOREG(SR_CORE_SPI), RB32_CORE_SPI);
-    _spi_iface->set_divider(B200_BUS_CLOCK_RATE/ADF4001_SPI_RATE);
-    _adf4001_iface = boost::shared_ptr<adf4001_ctrl>(new adf4001_ctrl(_spi_iface, ADF4001_SLAVENO));
-
     //register time now and pps onto available radio cores
     _tree->create<time_spec_t>(mb_path / "time" / "now")
         .publish(boost::bind(&time_core_3000::get_time_now, _radio_perifs[0].time64));
diff --git a/host/lib/usrp/b200/b200_impl.hpp b/host/lib/usrp/b200/b200_impl.hpp
index c3508c550..b319c230c 100644
--- a/host/lib/usrp/b200/b200_impl.hpp
+++ b/host/lib/usrp/b200/b200_impl.hpp
@@ -44,9 +44,9 @@
 #include <uhd/transport/bounded_buffer.hpp>
 #include <boost/weak_ptr.hpp>
 #include "recv_packet_demuxer_3000.hpp"
-static const boost::uint8_t  B200_FW_COMPAT_NUM_MAJOR = 0x04;
+static const boost::uint8_t  B200_FW_COMPAT_NUM_MAJOR = 0x05;
 static const boost::uint8_t  B200_FW_COMPAT_NUM_MINOR = 0x00;
-static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x03;
+static const boost::uint16_t B200_FPGA_COMPAT_NUM = 0x04;
 static const double          B200_BUS_CLOCK_RATE = 100e6;
 static const double          B200_DEFAULT_TICK_RATE = 32e6;
 static const boost::uint32_t B200_GPSDO_ST_NONE = 0x83;
diff --git a/host/lib/usrp/b200/b200_regs.hpp b/host/lib/usrp/b200/b200_regs.hpp
index c64066b27..2f4373409 100644
--- a/host/lib/usrp/b200/b200_regs.hpp
+++ b/host/lib/usrp/b200/b200_regs.hpp
@@ -52,6 +52,7 @@ localparam RB64_TIME_PPS        = 16;
 localparam RB64_CODEC_READBACK  = 24;
 
 //pll constants
+static const int AD9361_SLAVENO = (1 << 0);
 static const int ADF4001_SLAVENO = (1 << 1);
 static const double ADF4001_SPI_RATE = 10e3; //slow for large time constant on spi lines