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| author | Nick Foster <nick@ettus.com> | 2011-09-01 12:48:16 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-09-23 16:46:26 -0700 |
| commit | b998964ca78e3d7927c82680c167aebf9cabae73 (patch) | |
| tree | e971460694fc71a7224ee3a93e38af68d7aa6d08 /host/lib/usrp/b100/clock_ctrl.hpp | |
| parent | d5d448eb8f19d73c7abbef5d5a49e9c4cd24fee2 (diff) | |
| download | uhd-b998964ca78e3d7927c82680c167aebf9cabae73.tar.gz uhd-b998964ca78e3d7927c82680c167aebf9cabae73.tar.bz2 uhd-b998964ca78e3d7927c82680c167aebf9cabae73.zip | |
B100: unshadow dboard clock rates so you can set master freq after init and still tune ok
Diffstat (limited to 'host/lib/usrp/b100/clock_ctrl.hpp')
| -rw-r--r-- | host/lib/usrp/b100/clock_ctrl.hpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/host/lib/usrp/b100/clock_ctrl.hpp b/host/lib/usrp/b100/clock_ctrl.hpp index 5ef231281..68c24bdce 100644 --- a/host/lib/usrp/b100/clock_ctrl.hpp +++ b/host/lib/usrp/b100/clock_ctrl.hpp @@ -78,6 +78,18 @@ public: * \throw exception when rate cannot be achieved */ virtual void set_tx_dboard_clock_rate(double rate) = 0; + + /*! + * Get the current rx dboard clock rate. + * \return the clock rate in Hz + */ + virtual double get_rx_clock_rate(void) = 0; + + /*! + * Get the current tx dboard clock rate. + * \return the clock rate in Hz + */ + virtual double get_tx_clock_rate(void) = 0; /*! * Enable/disable the FPGA clock. |