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authorAshish Chaudhari <ashish@ettus.com>2014-04-24 13:01:37 -0700
committerAshish Chaudhari <ashish@ettus.com>2014-04-24 13:01:37 -0700
commit8e5fe11b6015c3456261d7b7b2ef6918fefa1ee8 (patch)
treebf786bb47828939ae958b43094f16ca80cb1a88c /host/lib/transport/nirio
parent4b4e493f976094115dad7809121a092e2ac31668 (diff)
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x300: Cleanup for PCIe flushing
Diffstat (limited to 'host/lib/transport/nirio')
-rw-r--r--host/lib/transport/nirio/niusrprio_session.cpp28
1 files changed, 14 insertions, 14 deletions
diff --git a/host/lib/transport/nirio/niusrprio_session.cpp b/host/lib/transport/nirio/niusrprio_session.cpp
index dd9cc2f8b..094009ae9 100644
--- a/host/lib/transport/nirio/niusrprio_session.cpp
+++ b/host/lib/transport/nirio/niusrprio_session.cpp
@@ -233,22 +233,22 @@ nirio_status niusrprio_session::_ensure_fpga_ready()
//Disable all FIFOs in the kernel driver
_riok_proxy.stop_all_fifos();
- }
- boost::posix_time::ptime start_time = boost::posix_time::microsec_clock::local_time();
- boost::posix_time::time_duration elapsed;
- do {
- boost::this_thread::sleep(boost::posix_time::microsec(1000)); //Avoid flooding the bus
- elapsed = boost::posix_time::microsec_clock::local_time() - start_time;
- nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
- } while (
- nirio_status_not_fatal(status) &&
- (reg_data & FPGA_STATUS_DMA_ACTIVE_MASK) &&
- elapsed.total_milliseconds() < FPGA_READY_TIMEOUT_IN_MS);
+ boost::posix_time::ptime start_time = boost::posix_time::microsec_clock::local_time();
+ boost::posix_time::time_duration elapsed;
+ do {
+ boost::this_thread::sleep(boost::posix_time::milliseconds(10)); //Avoid flooding the bus
+ elapsed = boost::posix_time::microsec_clock::local_time() - start_time;
+ nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
+ } while (
+ nirio_status_not_fatal(status) &&
+ (reg_data & FPGA_STATUS_DMA_ACTIVE_MASK) &&
+ elapsed.total_milliseconds() < FPGA_READY_TIMEOUT_IN_MS);
- nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
- if (nirio_status_not_fatal(status) && (reg_data & FPGA_STATUS_DMA_ACTIVE_MASK)) {
- return NiRio_Status_FpgaBusy;
+ nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
+ if (nirio_status_not_fatal(status) && (reg_data & FPGA_STATUS_DMA_ACTIVE_MASK)) {
+ return NiRio_Status_FifoReserved;
+ }
}
return status;