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author | Ashish Chaudhari <ashish@ettus.com> | 2019-05-27 13:29:42 -0700 |
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committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 11:49:17 -0800 |
commit | b1cf8ce634b234a0e546045a75fb8940d8e76c7f (patch) | |
tree | 7f129cebc039e53bb2125230cd82cf5d227242a4 /host/lib/rfnoc/client_zero.cpp | |
parent | fb0175a89ff85456f0efa59e726cf3abe1a87967 (diff) | |
download | uhd-b1cf8ce634b234a0e546045a75fb8940d8e76c7f.tar.gz uhd-b1cf8ce634b234a0e546045a75fb8940d8e76c7f.tar.bz2 uhd-b1cf8ce634b234a0e546045a75fb8940d8e76c7f.zip |
rfnoc: Support for new backend iface plus fixes
- Add support for new backend iface with max_async_msgs and mtu
moved to after the noc ID
- Fixed offsets for block info registers
Diffstat (limited to 'host/lib/rfnoc/client_zero.cpp')
-rw-r--r-- | host/lib/rfnoc/client_zero.cpp | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/host/lib/rfnoc/client_zero.cpp b/host/lib/rfnoc/client_zero.cpp index 91140f9e8..82c44eaf4 100644 --- a/host/lib/rfnoc/client_zero.cpp +++ b/host/lib/rfnoc/client_zero.cpp @@ -103,7 +103,7 @@ uint32_t client_zero::get_noc_id(uint16_t portno) { _check_port_number(portno); // The NOC ID is the second entry in the port's register space - return regs().peek32(_get_port_base_addr(portno) + 1); + return regs().peek32(_get_port_base_addr(portno) + 4); } bool client_zero::get_flush_active(uint16_t portno) @@ -175,16 +175,18 @@ void client_zero::reset_chdr(uint16_t portno) client_zero::block_config_info client_zero::get_block_info(uint16_t portno) { _check_port_number(portno); - // The configuration information is in the port's first register - uint32_t config_reg_val = regs().peek32(_get_port_base_addr(portno)); - return {uhd::narrow_cast<uint8_t>((config_reg_val & 0x000000FF) >> 0), - uhd::narrow_cast<uint8_t>((config_reg_val & 0x00003F00) >> 8), - uhd::narrow_cast<uint8_t>((config_reg_val & 0x000FC000) >> 14), - uhd::narrow_cast<uint8_t>((config_reg_val & 0x03F00000) >> 20), - uhd::narrow_cast<uint8_t>((config_reg_val & 0xFC000000) >> 26)}; + // The block and ctrl information is in the port's first register + uint32_t config_reg_val = regs().peek32(_get_port_base_addr(portno) + 0); + // The block and ctrl information is in the port's third register + uint32_t data_reg_val = regs().peek32(_get_port_base_addr(portno) + 8); + return {uhd::narrow_cast<uint8_t>((config_reg_val & 0x0000003F) >> 0), + uhd::narrow_cast<uint8_t>((config_reg_val & 0x00000FC0) >> 6), + uhd::narrow_cast<uint8_t>((config_reg_val & 0x0003F000) >> 12), + uhd::narrow_cast<uint8_t>((config_reg_val & 0x00FC0000) >> 18), + uhd::narrow_cast<uint8_t>((config_reg_val & 0xFF000000) >> 24), + uhd::narrow_cast<uint8_t>((data_reg_val & 0x000000FC) >> 2)}; } - uint32_t client_zero::_get_port_base_addr(uint16_t portno) { return REGS_PER_PORT * portno * 4; @@ -209,5 +211,5 @@ uint32_t client_zero::_get_flush_status_flags(uint16_t portno) { _check_port_number(portno); // The flush status flags are in the third register of the port - return regs().peek32(_get_port_base_addr(portno) + 2); + return regs().peek32(_get_port_base_addr(portno) + 8); } |