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| author | Martin Braun <martin.braun@ettus.com> | 2019-06-05 18:21:50 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2019-11-26 11:49:25 -0800 |
| commit | 0f59f6a8e5bde2b11bc3136ff68048dfb325252f (patch) | |
| tree | efa64c671ec6eceed639eb1d47ba67270779681a /host/lib/include/uhdlib | |
| parent | b92a8e2f2b548eef7cb5d58edc92d26befcf67d7 (diff) | |
| download | uhd-0f59f6a8e5bde2b11bc3136ff68048dfb325252f.tar.gz uhd-0f59f6a8e5bde2b11bc3136ff68048dfb325252f.tar.bz2 uhd-0f59f6a8e5bde2b11bc3136ff68048dfb325252f.zip | |
cores: gpio_atr_3000: Add capability to configure register offset
The existing implementation assumes registers are spaced 4 bytes apart.
In the current radio block design, all backward compatible registers are
spaced 8 bytes apart. This adds a feature to configure that offset.
Diffstat (limited to 'host/lib/include/uhdlib')
| -rw-r--r-- | host/lib/include/uhdlib/usrp/cores/gpio_atr_3000.hpp | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/host/lib/include/uhdlib/usrp/cores/gpio_atr_3000.hpp b/host/lib/include/uhdlib/usrp/cores/gpio_atr_3000.hpp index 4d2baf800..d03a395f8 100644 --- a/host/lib/include/uhdlib/usrp/cores/gpio_atr_3000.hpp +++ b/host/lib/include/uhdlib/usrp/cores/gpio_atr_3000.hpp @@ -24,7 +24,7 @@ public: static const uint32_t MASK_SET_ALL = 0xFFFFFFFF; - virtual ~gpio_atr_3000(void) {}; + virtual ~gpio_atr_3000(void) {} /*! * Create a read-write GPIO ATR interface object @@ -32,20 +32,23 @@ public: * \param iface register iface to GPIO ATR registers * \param base base settings offset for GPIO ATR registers * \param rb_addr readback offset for GPIO ATR registers + * \param reg_offset Delta between the register addresses */ - static sptr make( - uhd::wb_iface::sptr iface, + static sptr make(uhd::wb_iface::sptr iface, const uhd::wb_iface::wb_addr_type base, - const uhd::wb_iface::wb_addr_type rb_addr); + const uhd::wb_iface::wb_addr_type rb_addr, + const size_t reg_offset = 4); /*! * Create a write-only GPIO ATR interface object * * \param iface register iface to GPIO ATR registers * \param base base settings offset for GPIO ATR registers + * \param reg_offset Delta between the register addresses */ - static sptr make_write_only( - uhd::wb_iface::sptr iface, const uhd::wb_iface::wb_addr_type base); + static sptr make_write_only(uhd::wb_iface::sptr iface, + const uhd::wb_iface::wb_addr_type base, + const size_t reg_offset = 4); /*! * Select the ATR mode for all bits in the mask @@ -104,7 +107,7 @@ public: typedef uhd::usrp::dboard_iface::unit_t db_unit_t; - virtual ~db_gpio_atr_3000(void) {}; + virtual ~db_gpio_atr_3000(void) {} /*! * Create a read-write GPIO ATR interface object for a daughterboard connector @@ -112,11 +115,12 @@ public: * \param iface register iface to GPIO ATR registers * \param base base settings offset for GPIO ATR registers * \param rb_addr readback offset for GPIO ATR registers + * \param reg_offset Delta between the register addresses */ - static sptr make( - uhd::wb_iface::sptr iface, + static sptr make(uhd::wb_iface::sptr iface, const uhd::wb_iface::wb_addr_type base, - const uhd::wb_iface::wb_addr_type rb_addr); + const uhd::wb_iface::wb_addr_type rb_addr, + const size_t reg_offset = 4); /*! * Configure the GPIO mode for all pins in the daughterboard connector |