Merge branch 'master' into usrp2p

this was the merge from hell

Conflicts:

	firmware/microblaze/Makefile.am
	firmware/microblaze/bootstrap
	firmware/microblaze/configure.ac
	firmware/microblaze/lib/Makefile.inc
	host/lib/CMakeLists.txt
	host/lib/usrp/mimo_usrp.cpp
	host/lib/usrp/simple_usrp.cpp
	host/lib/usrp/usrp2/clock_ctrl.cpp
	host/lib/usrp/usrp2/codec_impl.cpp
	host/lib/usrp/usrp2/dboard_impl.cpp
	host/lib/usrp/usrp2/mboard_impl.cpp
	host/lib/usrp/usrp2/usrp2_iface.hpp
	host/lib/usrp/usrp2/usrp2_impl.hpp
	host/lib/usrp/usrp2/usrp2_regs.hpp
	host/test/CMakeLists.txt

3 files changed, 133 insertions, 2 deletions

diff --git a/host/lib/ic_reg_maps/CMakeLists.txt b/host/lib/ic_reg_maps/CMakeLists.txt
index 39f26a5a6..dd188d4c0 100644
--- a/host/lib/ic_reg_maps/CMakeLists.txt
+++ b/host/lib/ic_reg_maps/CMakeLists.txt
@@ -55,6 +55,11 @@ LIBUHD_PYTHON_GEN_SOURCE(
 )
 
 LIBUHD_PYTHON_GEN_SOURCE(
+    ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_max2118_regs.py
+    ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/max2118_regs.hpp
+)
+
+LIBUHD_PYTHON_GEN_SOURCE(
     ${CMAKE_SOURCE_DIR}/lib/ic_reg_maps/gen_ad9862_regs.py
     ${CMAKE_BINARY_DIR}/lib/ic_reg_maps/ad9862_regs.hpp
 )
diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py
index 47325a7e3..986093004 100644
--- a/host/lib/ic_reg_maps/common.py
+++ b/host/lib/ic_reg_maps/common.py
@@ -173,7 +173,7 @@ class mreg:
     def get_type(self):
         return 'boost::uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8)
 
-def generate(name, regs_tmpl, body_tmpl='', file=__file__):
+def generate(name, regs_tmpl, body_tmpl='', file=__file__, append=False):
     #evaluate the regs template and parse each line into a register
     regs = list(); mregs = list()
     for entry in parse_tmpl(regs_tmpl).splitlines():
@@ -193,4 +193,4 @@ def generate(name, regs_tmpl, body_tmpl='', file=__file__):
     )
 
     #write the generated code to file specified by argv1
-    open(sys.argv[1], 'w').write(code)
+    open(sys.argv[1], 'a' if append else 'w').write(code)
diff --git a/host/lib/ic_reg_maps/gen_max2118_regs.py b/host/lib/ic_reg_maps/gen_max2118_regs.py
new file mode 100644
index 000000000..506fbaec8
--- /dev/null
+++ b/host/lib/ic_reg_maps/gen_max2118_regs.py
@@ -0,0 +1,126 @@
+#!/usr/bin/env python
+#
+# Copyright 2010 Ettus Research LLC
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+
+########################################################################
+# Template for raw text data describing write registers
+# name addr[bit range inclusive] default optional enums
+########################################################################
+WRITE_REGS_TMPL="""\
+########################################################################
+## Note: offsets given from perspective of data bits (excludes address)
+########################################################################
+##
+########################################################################
+## N-Divider MSB (0) Write
+########################################################################
+div2                  0[7]          0       div4, div2
+n_divider_msb         0[0:6]        3
+########################################################################
+## N-Divider LSB (1) Write
+########################################################################
+n_divider_lsb         1[0:7]        0xB6
+~n_divider            n_divider_lsb, n_divider_msb
+########################################################################
+## R, Charge Pump, and VCO (2) Write
+########################################################################
+#set $r_divider_names = ', '.join(map(lambda x: 'div' + str(2**(x+1)), range(0,8)))
+r_divider             2[5:7]        1       $r_divider_names 
+#set $cp_current_bias = ', '.join(map(lambda x: 'i_cp_%dua'%(50*2**x), range(0,4)))
+cp_current            2[3:4]        3       $cp_current_bias
+osc_band              2[0:2]        5
+########################################################################
+## I/Q Filter DAC (3) Write
+########################################################################
+##unused              3[7]          0
+f_dac                 3[0:6]        0x7F    ## filter tuning dac, depends on m
+########################################################################
+## LPF Divider DAC (4) Write
+########################################################################
+adl_vco_adc_latch     4[7]          0       disabled, enabled
+ade_vco_ade_read      4[6]          0       disabled, enabled
+dl_output_drive       4[5]          0       iq_590m_vpp, iq_1_vpp
+m_divider             4[0:4]        2       ## filter tuning counter
+########################################################################
+## GC2 and Diag (5) Write
+########################################################################
+diag                  5[5:7]        0       normal, cp_i_source, cp_i_sink, cp_high_z, unused, n_and_filt, r_and_gc2, m_div
+gc2                   5[0:4]        0x1F    ## Step Size: 0-1: 0dB, 2-22: 1dB, 23-31: 0.5dB
+"""
+
+########################################################################
+# Template for raw text data describing read registers
+# name addr[bit range inclusive] default optional enums
+########################################################################
+READ_REGS_TMPL="""\
+########################################################################
+## Status (0) Read
+########################################################################
+pwr                   0[6]          0       not_reset, reset
+adc                   0[2:4]        0       ## VCO tuning voltage, Lock Status
+########################################################################
+## I/Q Filter DAC (1) Read
+########################################################################
+filter_dac            1[0:6]        0       ## I/Q Filter tuning DAC, current
+"""
+
+########################################################################
+# Template for methods in the body of the struct
+########################################################################
+BODY_TMPL="""\
+boost::uint8_t get_reg(boost::uint8_t addr){
+    boost::uint8_t reg = 0;
+    switch(addr){
+    #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs)))
+    case $addr:
+        #for $reg in filter(lambda r: r.get_addr() == addr, $regs)
+        reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift();
+        #end for
+        break;
+    #end for
+    }
+    return boost::uint8_t(reg);
+}
+
+void set_reg(boost::uint8_t addr, boost::uint8_t reg){
+    switch(addr){
+    #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs)))
+    case $addr:
+        #for $reg in filter(lambda r: r.get_addr() == addr, $regs)
+        $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask());
+        #end for
+        break;
+    #end for
+    }
+}
+"""
+
+if __name__ == '__main__':
+    import common; common.generate(
+        name='max2118_write_regs',
+        regs_tmpl=WRITE_REGS_TMPL,
+        body_tmpl=BODY_TMPL,
+        file=__file__,
+    )
+
+    import common; common.generate(
+        name='max2118_read_regs',
+        regs_tmpl=READ_REGS_TMPL,
+        body_tmpl=BODY_TMPL,
+        file=__file__,
+        append=True,
+    )