Refactor ATR part of dboard interface (and some constants).

Added peek and poke to the dude/bro protocol.
Started moving more control code through peek and poke.
Added usrp_regs.hpp to be like memory map for slave perifs.

1 files changed, 31 insertions, 44 deletions

diff --git a/host/include/uhd/usrp/dboard_interface.hpp b/host/include/uhd/usrp/dboard_interface.hpp
index c779431ab..8ff0c5d2f 100644
--- a/host/include/uhd/usrp/dboard_interface.hpp
+++ b/host/include/uhd/usrp/dboard_interface.hpp
@@ -38,32 +38,34 @@ public:
 
     //tells the host which unit to use
     enum unit_type_t{
-        UNIT_TYPE_RX,
-        UNIT_TYPE_TX
+        UNIT_TYPE_RX = 'r',
+        UNIT_TYPE_TX = 't'
     };
 
     //tells the host which device to use
     enum spi_dev_t{
-        SPI_TX_DEV,
-        SPI_RX_DEV
+        SPI_DEV_RX = 'r',
+        SPI_DEV_TX = 't'
     };
 
-    //args for writing spi data
-    enum spi_push_t{
-        SPI_PUSH_RISE,
-        SPI_PUSH_FALL
-    };
-
-    //args for reading spi data
-    enum spi_latch_t{
-        SPI_LATCH_RISE,
-        SPI_LATCH_FALL
+    //args for spi format
+    enum spi_edge_t{
+        SPI_EDGE_RISE = 'r',
+        SPI_EDGE_FALL = 'f'
     };
 
     //tell the host which gpio bank
     enum gpio_bank_t{
-        GPIO_TX_BANK,
-        GPIO_RX_BANK
+        GPIO_BANK_RX = 'r',
+        GPIO_BANK_TX = 't'
+    };
+
+    //possible atr registers
+    enum atr_reg_t{
+        ATR_REG_IDLE   = 'i',
+        ATR_REG_TXONLY = 't',
+        ATR_REG_RXONLY = 'r',
+        ATR_REG_BOTH   = 'b'
     };
 
     //structors
@@ -87,17 +89,13 @@ public:
     virtual int read_aux_adc(unit_type_t unit, int which_adc) = 0;
 
     /*!
-     * Set daughterboard ATR register.
-     * The ATR register for a particular bank has 2 values:
-     * one value when transmitting, one when receiving.
-     * The mask controls which pins are controlled by ATR.
+     * Set a daughterboard ATR register.
      *
-     * \param bank      GPIO_TX_BANK or GPIO_RX_BANK
-     * \param tx_value  16-bits, 0=FPGA output low, 1=FPGA output high
-     * \param rx_value  16-bits, 0=FPGA output low, 1=FPGA output high
-     * \param mask      16-bits, 0=software, 1=atr
+     * \param bank   GPIO_TX_BANK or GPIO_RX_BANK
+     * \param reg    which ATR register to set
+     * \param value  16-bits, 0=FPGA output low, 1=FPGA output high
      */
-    virtual void set_atr_reg(gpio_bank_t bank, boost::uint16_t tx_value, boost::uint16_t rx_value, boost::uint16_t mask) = 0;
+    virtual void set_atr_reg(gpio_bank_t bank, atr_reg_t reg, boost::uint16_t value) = 0;
 
     /*!
      * Set daughterboard GPIO data direction register.
@@ -108,14 +106,6 @@ public:
     virtual void set_gpio_ddr(gpio_bank_t bank, boost::uint16_t value) = 0;
 
     /*!
-     * Set daughterboard GPIO pin values.
-     *
-     * \param bank     GPIO_TX_BANK or GPIO_RX_BANK
-     * \param value    16 bits, 0=low, 1=high
-     */
-    virtual void write_gpio(gpio_bank_t bank, boost::uint16_t value) = 0;
-
-    /*!
      * Read daughterboard GPIO pin values
      *
      * \param bank GPIO_TX_BANK or GPIO_RX_BANK
@@ -142,32 +132,31 @@ public:
      * \brief Write data to SPI bus peripheral.
      *
      * \param dev which spi device
-     * \param push args for writing
+     * \param edge args for format
      * \param buf the data to write
      */
-    void write_spi(spi_dev_t dev, spi_push_t push, const byte_vector_t &buf);
+    void write_spi(spi_dev_t dev, spi_edge_t edge, const byte_vector_t &buf);
 
     /*!
      * \brief Read data to SPI bus peripheral.
      *
      * \param dev which spi device
-     * \param latch args for reading
+     * \param edge args for format
      * \param num_bytes number of bytes to read
      * \return the data that was read
      */
-    byte_vector_t read_spi(spi_dev_t dev, spi_latch_t latch, size_t num_bytes);
+    byte_vector_t read_spi(spi_dev_t dev, spi_edge_t edge, size_t num_bytes);
 
     /*!
      * \brief Read and write data to SPI bus peripheral.
      * The data read back will be the same length as the input buffer.
      *
      * \param dev which spi device
-     * \param latch args for reading
-     * \param push args for clock
+     * \param edge args for format
      * \param buf the data to write
      * \return the data that was read
      */
-    byte_vector_t read_write_spi(spi_dev_t dev, spi_latch_t latch, spi_push_t push, const byte_vector_t &buf);
+    byte_vector_t read_write_spi(spi_dev_t dev, spi_edge_t edge, const byte_vector_t &buf);
 
     /*!
      * \brief Get the rate of the rx dboard clock.
@@ -186,16 +175,14 @@ private:
      * \brief Read and write data to SPI bus peripheral.
      *
      * \param dev which spi device
-     * \param latch args for reading
-     * \param push args for clock
+     * \param edge args for format
      * \param buf the data to write
      * \param readback false for write only
      * \return the data that was read
      */
     virtual byte_vector_t transact_spi(
         spi_dev_t dev,
-        spi_latch_t latch,
-        spi_push_t push,
+        spi_edge_t edge,
         const byte_vector_t &buf,
         bool readback
     ) = 0;