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| author | Andrew Moch <Andrew.Moch@ni.com> | 2020-06-09 20:35:31 +0100 |
|---|---|---|
| committer | Wade Fife <wade.fife@ettus.com> | 2020-06-18 09:09:34 -0500 |
| commit | 3af8dcaacfa4bf36dcae3bdbf0b353385b7063c6 (patch) | |
| tree | cac4cae52b2b096570bd69229b43c9259d44ca7e /host/include | |
| parent | 19f19c77a91dcba6c1bf0f99e73ae9ffca1d75a4 (diff) | |
| download | uhd-3af8dcaacfa4bf36dcae3bdbf0b353385b7063c6.tar.gz uhd-3af8dcaacfa4bf36dcae3bdbf0b353385b7063c6.tar.bz2 uhd-3af8dcaacfa4bf36dcae3bdbf0b353385b7063c6.zip | |
fpga: rfnoc: Add support for 512-bit CHDR widths
This fixes the rfnoc_null_src_sink, chdr_crossbar_nxn, and
chdr_stream_endpoint blocks so that wider CHDR widths are properly
supported. It also updates PkgChdrBfm to able to properly test these
blocks. The testbenches have been updated to test both 64 and 512-bit
widths.
Diffstat (limited to 'host/include')
| -rw-r--r-- | host/include/uhd/rfnoc/blocks/null_src_sink.yml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/host/include/uhd/rfnoc/blocks/null_src_sink.yml b/host/include/uhd/rfnoc/blocks/null_src_sink.yml index 919e61ebe..020abbc1c 100644 --- a/host/include/uhd/rfnoc/blocks/null_src_sink.yml +++ b/host/include/uhd/rfnoc/blocks/null_src_sink.yml @@ -8,6 +8,10 @@ noc_id: 0x1 # FPGA repository makefile_srcs: "${fpga_lib_dir}/blocks/rfnoc_block_null_src_sink/Makefile.srcs" +parameters: + NIPC: 2 + ITEM_W: 32 + clocks: - name: rfnoc_chdr freq: "[]" |