uhd/mpm: eiscat: Various changes

- correct lmk initialization parameters
- adding missing parameters and consts wrt clock synchronization.
- fixed default master clock rate
- eiscat, ddc: update xml.
 - remove references to CORDIC_FREQ in ddc_eiscat
 - update readback reg addr in radio_eiscat
 - set default spp from 3992 to 3968.
- updated jesd mode sequence initialization
- updating eiscat_radio_ctrl_impl
 - add rx_codecs to property tree to display correct ADC chip.
 - updated issue_stream_cmd

2 files changed, 66 insertions, 10 deletions

diff --git a/host/include/uhd/rfnoc/blocks/ddc_eiscat.xml b/host/include/uhd/rfnoc/blocks/ddc_eiscat.xml
index 6cd0f117c..df39ce891 100644
--- a/host/include/uhd/rfnoc/blocks/ddc_eiscat.xml
+++ b/host/include/uhd/rfnoc/blocks/ddc_eiscat.xml
@@ -25,8 +25,8 @@
     </setreg>
     <!-- DDC block registers -->
     <setreg>
-      <!-- CORDIC phase increment word -->
-      <name>CORDIC_FREQ</name>
+      <!-- DDS phase increment word -->
+      <name>DDS_FREQ</name>
       <address>132</address>
     </setreg>
     <setreg>
@@ -41,6 +41,7 @@
     </setreg>
     <setreg>
       <!-- Real mode, swap IQ -->
+      <!-- Real mode = bit 1, swap IQ = bit 0 -->
       <name>MODE</name>
       <address>135</address>
     </setreg>
@@ -57,6 +58,17 @@
       <type>double</type>
       <value>0.0</value>
       <port>0</port>
+      <!--<action>-->
+          <!--SR_WRITE("CORDIC_FREQ", $cordic_freq)-->
+      <!--</action>-->
+      <!--FIXME Calculate this properly-->
+    </arg>
+    <arg>
+      <name>mode</name>
+      <type>int</type>
+      <value>2</value>
+      <port>0</port>
+      <action>SR_WRITE("MODE", $mode)</action>
     </arg>
     <arg>
       <name>input_rate</name>
@@ -92,6 +104,17 @@
       <type>double</type>
       <value>0.0</value>
       <port>1</port>
+      <!--<action>-->
+          <!--SR_WRITE("CORDIC_FREQ", $cordic_freq)-->
+      <!--</action>-->
+      <!--FIXME Calculate this properly-->
+    </arg>
+    <arg>
+      <name>mode</name>
+      <type>int</type>
+      <value>2</value>
+      <port>1</port>
+      <action>SR_WRITE("MODE", $mode)</action>
     </arg>
     <arg>
       <name>input_rate</name>
@@ -127,6 +150,17 @@
       <type>double</type>
       <value>0.0</value>
       <port>2</port>
+      <!--<action>-->
+          <!--SR_WRITE("CORDIC_FREQ", $cordic_freq)-->
+      <!--</action>-->
+      <!--FIXME Calculate this properly-->
+    </arg>
+    <arg>
+      <name>mode</name>
+      <type>int</type>
+      <value>2</value>
+      <port>2</port>
+      <action>SR_WRITE("MODE", $mode)</action>
     </arg>
     <arg>
       <name>input_rate</name>
@@ -162,6 +196,17 @@
       <type>double</type>
       <value>0.0</value>
       <port>3</port>
+      <!--<action>-->
+          <!--SR_WRITE("CORDIC_FREQ", $cordic_freq)-->
+      <!--</action>-->
+      <!--FIXME Calculate this properly-->
+    </arg>
+    <arg>
+      <name>mode</name>
+      <type>int</type>
+      <value>2</value>
+      <port>3</port>
+      <action>SR_WRITE("MODE", $mode)</action>
     </arg>
     <arg>
       <name>input_rate</name>
@@ -197,6 +242,17 @@
       <type>double</type>
       <value>0.0</value>
       <port>4</port>
+      <!--<action>-->
+          <!--SR_WRITE("CORDIC_FREQ", $cordic_freq)-->
+      <!--</action>-->
+      <!--FIXME Calculate this properly-->
+    </arg>
+    <arg>
+      <name>mode</name>
+      <type>int</type>
+      <value>2</value>
+      <port>4</port>
+      <action>SR_WRITE("MODE", $mode)</action>
     </arg>
     <arg>
       <name>input_rate</name>
diff --git a/host/include/uhd/rfnoc/blocks/radio_eiscat.xml b/host/include/uhd/rfnoc/blocks/radio_eiscat.xml
index ddf68580b..cc6fb7f3b 100644
--- a/host/include/uhd/rfnoc/blocks/radio_eiscat.xml
+++ b/host/include/uhd/rfnoc/blocks/radio_eiscat.xml
@@ -23,7 +23,7 @@
        to output jesd streams directly [3:0] = 6 -->
       <name>SR_BEAMS_TO_NEIGHBOR</name>
       <address>202</address>
-      <value>2</value>
+      <value>14</value>
     </setreg>
     <setreg>
       <!--1-Bit register. Are we expecting previous contributions? 1==yes we are -->
@@ -57,23 +57,23 @@
     </setreg>
     <readback>
       <name>RB_NUM_TAPS</name>
-      <address>0</address>
+      <address>6</address>
     </readback>
     <readback>
       <name>RB_NUM_CHANNELS</name>
-      <address>1</address>
+      <address>7</address>
     </readback>
     <readback>
       <name>RB_NUM_BEAMS</name>
-      <address>2</address>
+      <address>8</address>
     </readback>
     <readback>
       <name>RB_NUM_FILTERS</name>
-      <address>3</address>
+      <address>9</address>
     </readback>
     <readback>
-      <name>RB_VITA_TIME</name>
-      <address>4</address>
+      <name>RB_STREAM_ENABLED</name>
+      <address>10</address>
     </readback>
   </registers>
   <!-- Args -->
@@ -82,7 +82,7 @@
     <arg>
       <name>spp</name>
       <type>int</type>
-      <value>3992</value>
+      <value>3968</value>
     </arg>
     <arg>
       <name>taps</name>