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authorMartin Braun <martin.braun@ettus.com>2016-11-01 16:45:29 -0700
committerMartin Braun <martin.braun@ettus.com>2018-03-16 10:48:46 -0700
commit49520bfecb5e13126224ee915208c2cd936f911c (patch)
tree8daa638d55ffe5294306a6fe8e2c8b6261d8a375 /host/include
parent60a911cd460ca1e29d838ee0039d67bf7c8fe7f3 (diff)
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rfnoc: ctrl_iface cleanup
- ctrl_iface is now longer a wb_iface. All it can do now is send command packets, and receive responses to those. - ctrl_iface does not store command time or tick rate - wb_iface_adapter is no longer a set of functors, but a wrapper around ctrl_iface. Command times are stored once, in the block. - DMA FIFO and radio block controllers have an easier time getting access to a timed_wb_iface
Diffstat (limited to 'host/include')
-rw-r--r--host/include/uhd/rfnoc/block_ctrl_base.hpp17
-rw-r--r--host/include/uhd/rfnoc/constants.hpp2
2 files changed, 13 insertions, 6 deletions
diff --git a/host/include/uhd/rfnoc/block_ctrl_base.hpp b/host/include/uhd/rfnoc/block_ctrl_base.hpp
index 25b1e4a09..70725627a 100644
--- a/host/include/uhd/rfnoc/block_ctrl_base.hpp
+++ b/host/include/uhd/rfnoc/block_ctrl_base.hpp
@@ -24,8 +24,9 @@
namespace uhd {
namespace rfnoc {
+ // Forward declarations
+ class ctrl_iface;
namespace nocscript {
- // Forward declaration
class block_iface;
}
@@ -39,8 +40,8 @@ struct make_args_t
block_key(key)
{}
- //! A valid interface that allows us to do peeks and pokes
- std::map<size_t, uhd::wb_iface::sptr> ctrl_ifaces;
+ //! A valid interface that allows us to read and write registers
+ std::map<size_t, boost::shared_ptr<ctrl_iface> > ctrl_ifaces;
//! This block's base address (address of block port 0)
uint32_t base_address;
//! The device index (or motherboard index).
@@ -359,8 +360,7 @@ protected:
};
//! Get a control interface object for block port \p block_port
- wb_iface::sptr get_ctrl_iface(const size_t block_port);
-
+ timed_wb_iface::sptr get_ctrl_iface(const size_t block_port);
/***********************************************************************
* Hooks & Derivables
@@ -397,11 +397,16 @@ private:
//! Helper function to initialize the block args (used by ctor only)
void _init_block_args();
+ //! Helper to create a lambda to read tick rate
+ double get_command_tick_rate(const size_t port);
+
/***********************************************************************
* Private members
**********************************************************************/
//! Objects to actually send and receive the commands
- std::map<size_t, wb_iface::sptr> _ctrl_ifaces;
+ std::map<size_t, boost::shared_ptr<ctrl_iface> > _ctrl_ifaces;
+ std::map<size_t, time_spec_t> _cmd_timespecs;
+ std::map<size_t, double> _cmd_tickrates;
//! The base address of this block (the address of block port 0)
uint32_t _base_address;
diff --git a/host/include/uhd/rfnoc/constants.hpp b/host/include/uhd/rfnoc/constants.hpp
index 53514c157..94cca3e7a 100644
--- a/host/include/uhd/rfnoc/constants.hpp
+++ b/host/include/uhd/rfnoc/constants.hpp
@@ -80,6 +80,8 @@ static const uint32_t AXI_WRAPPER_BASE = 128;
static const uint32_t AXIS_CONFIG_BUS = AXI_WRAPPER_BASE+1; // tdata with tvalid asserted
static const uint32_t AXIS_CONFIG_BUS_TLAST = AXI_WRAPPER_BASE+2; // tdata with tvalid & tlast asserted
+static const size_t CMD_FIFO_SIZE = 128; // Lines == multiples of 8 bytes
+
// Named settings registers
static const uhd::dict<std::string, uint32_t> DEFAULT_NAMED_SR = boost::assign::map_list_of
("AXIS_CONFIG_BUS", AXIS_CONFIG_BUS)